diff options
| -rw-r--r-- | src/southbridge/intel/common/smihandler.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/common/usb_debug.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_bd82x6x/smihandler.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_i89xx/smihandler.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/ibexpeak/smihandler.c | 4 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/early_usb.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/smihandler.c | 4 | ||||
| -rw-r--r-- | src/southbridge/nvidia/mcp55/nic.c | 2 | ||||
| -rw-r--r-- | src/southbridge/sis/sis966/sis966.c | 2 |
9 files changed, 14 insertions, 14 deletions
diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c index 17fae11db3..65a1b96872 100644 --- a/src/southbridge/intel/common/smihandler.c +++ b/src/southbridge/intel/common/smihandler.c @@ -234,11 +234,11 @@ em64t101_smm_state_save_area_t *smi_apmc_find_state_save(u8 cmd) for (node = 0; node < CONFIG_MAX_CPUS; node++) { state = smm_get_save_state(node); - /* Check for Synchronous IO (bit0==1) */ + /* Check for Synchronous IO (bit0 == 1) */ if (!(state->io_misc_info & (1 << 0))) continue; - /* Make sure it was a write (bit4==0) */ + /* Make sure it was a write (bit4 == 0) */ if (state->io_misc_info & (1 << 4)) continue; diff --git a/src/southbridge/intel/common/usb_debug.c b/src/southbridge/intel/common/usb_debug.c index f74da657fd..d87e018d85 100644 --- a/src/southbridge/intel/common/usb_debug.c +++ b/src/southbridge/intel/common/usb_debug.c @@ -30,7 +30,7 @@ pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx) if (!IS_ENABLED(CONFIG_HAVE_USBDEBUG_OPTIONS)) return PCI_DEV(0, 0x1d, 7); - if (hcd_idx==2) + if (hcd_idx == 2) dev = PCI_DEV(0, 0x1a, 0); else dev = PCI_DEV(0, 0x1d, 0); diff --git a/src/southbridge/intel/fsp_bd82x6x/smihandler.c b/src/southbridge/intel/fsp_bd82x6x/smihandler.c index 394e0a9a1f..83eab79b87 100644 --- a/src/southbridge/intel/fsp_bd82x6x/smihandler.c +++ b/src/southbridge/intel/fsp_bd82x6x/smihandler.c @@ -411,11 +411,11 @@ static em64t101_smm_state_save_area_t *smi_apmc_find_state_save(u8 cmd) for (node = 0; node < CONFIG_MAX_CPUS; node++) { state = smm_get_save_state(node); - /* Check for Synchronous IO (bit0==1) */ + /* Check for Synchronous IO (bit0 == 1) */ if (!(state->io_misc_info & (1 << 0))) continue; - /* Make sure it was a write (bit4==0) */ + /* Make sure it was a write (bit4 == 0) */ if (state->io_misc_info & (1 << 4)) continue; diff --git a/src/southbridge/intel/fsp_i89xx/smihandler.c b/src/southbridge/intel/fsp_i89xx/smihandler.c index ff76c20275..8a6506b77a 100644 --- a/src/southbridge/intel/fsp_i89xx/smihandler.c +++ b/src/southbridge/intel/fsp_i89xx/smihandler.c @@ -411,11 +411,11 @@ static em64t101_smm_state_save_area_t *smi_apmc_find_state_save(u8 cmd) for (node = 0; node < CONFIG_MAX_CPUS; node++) { state = smm_get_save_state(node); - /* Check for Synchronous IO (bit0==1) */ + /* Check for Synchronous IO (bit0 == 1) */ if (!(state->io_misc_info & (1 << 0))) continue; - /* Make sure it was a write (bit4==0) */ + /* Make sure it was a write (bit4 == 0) */ if (state->io_misc_info & (1 << 4)) continue; diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c index 29c46e8379..12a7ac03db 100644 --- a/src/southbridge/intel/ibexpeak/smihandler.c +++ b/src/southbridge/intel/ibexpeak/smihandler.c @@ -514,11 +514,11 @@ static em64t101_smm_state_save_area_t *smi_apmc_find_state_save(u8 cmd) for (node = 0; node < CONFIG_MAX_CPUS; node++) { state = smm_get_save_state(node); - /* Check for Synchronous IO (bit0==1) */ + /* Check for Synchronous IO (bit0 == 1) */ if (!(state->io_misc_info & (1 << 0))) continue; - /* Make sure it was a write (bit4==0) */ + /* Make sure it was a write (bit4 == 0) */ if (state->io_misc_info & (1 << 4)) continue; diff --git a/src/southbridge/intel/lynxpoint/early_usb.c b/src/southbridge/intel/lynxpoint/early_usb.c index 8262de8412..a64530eae0 100644 --- a/src/southbridge/intel/lynxpoint/early_usb.c +++ b/src/southbridge/intel/lynxpoint/early_usb.c @@ -20,7 +20,7 @@ #include <device/pci_def.h> #include "pch.h" -/* HCD_INDEX==2 selects 0:1a.0 (PCH_EHCI2), any other index +/* HCD_INDEX == 2 selects 0:1a.0 (PCH_EHCI2), any other index * selects 0:1d.0 (PCH_EHCI1) for usbdebug use. */ #if CONFIG_USBDEBUG_HCD_INDEX != 2 diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c index 37a7a2b6a7..dcec3f0824 100644 --- a/src/southbridge/intel/lynxpoint/smihandler.c +++ b/src/southbridge/intel/lynxpoint/smihandler.c @@ -221,11 +221,11 @@ static em64t101_smm_state_save_area_t *smi_apmc_find_state_save(u8 cmd) for (node = 0; node < CONFIG_MAX_CPUS; node++) { state = smm_get_save_state(node); - /* Check for Synchronous IO (bit0==1) */ + /* Check for Synchronous IO (bit0 == 1) */ if (!(state->io_misc_info & (1 << 0))) continue; - /* Make sure it was a write (bit4==0) */ + /* Make sure it was a write (bit4 == 0) */ if (state->io_misc_info & (1 << 4)) continue; diff --git a/src/southbridge/nvidia/mcp55/nic.c b/src/southbridge/nvidia/mcp55/nic.c index be9daf7d7c..788b6efd17 100644 --- a/src/southbridge/nvidia/mcp55/nic.c +++ b/src/southbridge/nvidia/mcp55/nic.c @@ -42,7 +42,7 @@ static int phy_read(u8 *base, unsigned phy_addr, unsigned phy_reg) write32(base + 0x190, (phy_addr << 5) | (phy_reg)); do { dword = read32(base + 0x190); - if (--loop==0) + if (--loop == 0) return -4; } while ((dword & (1 << 15))); diff --git a/src/southbridge/sis/sis966/sis966.c b/src/southbridge/sis/sis966/sis966.c index 57d649857e..d84b3739d3 100644 --- a/src/southbridge/sis/sis966/sis966.c +++ b/src/southbridge/sis/sis966/sis966.c @@ -70,7 +70,7 @@ void sis966_enable(device_t dev) conf = dev->chip_info; int i; - if (dev->device==0x0000) { + if (dev->device == 0x0000) { reg = pci_read_config32(dev, PCI_VENDOR_ID); deviceid = (reg >> 16) & 0xffff; vendorid = reg & 0xffff; |