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-rw-r--r--src/soc/intel/alderlake/Kconfig1
-rw-r--r--src/soc/intel/alderlake/include/soc/pmc.h2
2 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index adb6a4355f..af1a04934c 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -83,6 +83,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_ACPI_CPPC
select SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID
select SOC_INTEL_COMMON_BLOCK_ACPI_GPIO
+ select SOC_INTEL_COMMON_BLOCK_ACPI_LPIT
select SOC_INTEL_COMMON_BLOCK_ACPI_PEP
select SOC_INTEL_COMMON_BLOCK_ACPI_PEP_LPM_REQ
select SOC_INTEL_COMMON_BLOCK_CAR
diff --git a/src/soc/intel/alderlake/include/soc/pmc.h b/src/soc/intel/alderlake/include/soc/pmc.h
index 8600d0e078..81a99e00ec 100644
--- a/src/soc/intel/alderlake/include/soc/pmc.h
+++ b/src/soc/intel/alderlake/include/soc/pmc.h
@@ -153,6 +153,8 @@ extern struct device_operations pmc_ops;
#define HPR_CAUSE0_MI_HRPC (1 << 9)
#define HPR_CAUSE0_MI_HR (1 << 8)
+#define SLP_S0_RES 0x193c
+
#define CPPMVRIC 0x1B1C
#define XTALSDQDIS (1 << 22)