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-rw-r--r--src/mainboard/intel/adlrvp/memory.c28
1 files changed, 9 insertions, 19 deletions
diff --git a/src/mainboard/intel/adlrvp/memory.c b/src/mainboard/intel/adlrvp/memory.c
index 5d374db2a6..b203f69240 100644
--- a/src/mainboard/intel/adlrvp/memory.c
+++ b/src/mainboard/intel/adlrvp/memory.c
@@ -22,29 +22,19 @@ static const struct mb_cfg ddr4_mem_config = {
static const struct mb_cfg lpddr4_mem_config = {
/* DQ byte map */
.dq_map = {
- { 0, 2, 3, 1, 6, 7, 5, 4, /* Byte 0 */
- 10, 8, 11, 9, 14, 12, 13, 15 }, /* Byte 1 */
- { 12, 8, 14, 10, 11, 13, 15, 9, /* Byte 2 */
- 5, 0, 7, 3, 6, 2, 1, 4 }, /* Byte 3 */
- { 3, 0, 2, 1, 6, 5, 4, 7, /* Byte 4 */
- 12, 13, 14, 15, 10, 9, 8, 11 }, /* Byte 5 */
- { 2, 6, 7, 1, 3, 4, 0, 5, /* Byte 6 */
- 9, 13, 8, 15, 14, 11, 12, 10 }, /* Byte 7 */
- { 3, 0, 1, 2, 7, 4, 6, 5, /* Byte 0 */
- 10, 8, 11, 9, 14, 13, 12, 15 }, /* Byte 1 */
- { 10, 12, 14, 8, 9, 13, 15, 11, /* Byte 2 */
- 3, 7, 6, 2, 0, 4, 5, 1 }, /* Byte 3 */
- { 12, 15, 14, 13, 9, 10, 11, 8, /* Byte 4 */
- 7, 4, 6, 5, 0, 1, 3, 2 }, /* Byte 5 */
- { 0, 2, 4, 3, 1, 6, 7, 5, /* Byte 6 */
- 13, 9, 10, 11, 8, 12, 14, 15 }, /* Byte 7 */
+ { 0, 2, 3, 1, 6, 7, 5, 4, 10, 8, 11, 9, 14, 12, 13, 15 },
+ { 12, 8, 14, 10, 11, 13, 15, 9, 5, 0, 7, 3, 6, 2, 1, 4 },
+ { 3, 0, 2, 1, 6, 5, 4, 7, 12, 13, 14, 15, 10, 9, 8, 11 },
+ { 2, 6, 7, 1, 3, 4, 0, 5, 9, 13, 8, 15, 14, 11, 12, 10 },
+ { 3, 0, 1, 2, 7, 4, 6, 5, 10, 8, 11, 9, 14, 13, 12, 15 },
+ { 10, 12, 14, 8, 9, 13, 15, 11, 3, 7, 6, 2, 0, 4, 5, 1 },
+ { 12, 15, 14, 13, 9, 10, 11, 8, 7, 4, 6, 5, 0, 1, 3, 2 },
+ { 0, 2, 4, 3, 1, 6, 7, 5, 13, 9, 10, 11, 8, 12, 14, 15 },
},
/* DQS CPU<>DRAM map */
.dqs_map = {
- /* Ch 0 1 2 3 */
- { 0, 1 }, { 1, 0 }, { 0, 1 }, { 0, 1 },
- { 0, 1 }, { 1, 0 }, { 1, 0 }, { 0, 1 }
+ { 0, 1 }, { 1, 0 }, { 0, 1 }, { 0, 1 }, { 0, 1 }, { 1, 0 }, { 1, 0 }, { 0, 1 }
},
.dq_pins_interleaved = false,