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-rw-r--r--src/drivers/mipi/panel.c48
-rw-r--r--src/include/mipi/dsi.h112
-rw-r--r--src/include/mipi/panel.h3
-rw-r--r--src/soc/mediatek/common/dsi.c55
-rw-r--r--src/soc/mediatek/common/include/soc/dsi_common.h107
-rw-r--r--src/soc/nvidia/tegra210/include/soc/mipi_display.h112
-rw-r--r--src/soc/nvidia/tegra210/include/soc/mipi_dsi.h6
-rw-r--r--src/soc/qualcomm/sc7180/display/dsi.c29
-rw-r--r--src/soc/rockchip/rk3399/include/soc/mipi.h12
9 files changed, 188 insertions, 296 deletions
diff --git a/src/drivers/mipi/panel.c b/src/drivers/mipi/panel.c
index e8469a6e36..f1d87c32d1 100644
--- a/src/drivers/mipi/panel.c
+++ b/src/drivers/mipi/panel.c
@@ -7,6 +7,7 @@
cb_err_t mipi_panel_parse_init_commands(const void *buf, mipi_cmd_func_t cmd_func)
{
const struct panel_init_command *init = buf;
+ enum mipi_dsi_transaction type;
/*
* The given commands should be in a buffer containing a packed array of
@@ -23,25 +24,54 @@ cb_err_t mipi_panel_parse_init_commands(const void *buf, mipi_cmd_func_t cmd_fun
u32 cmd = init->cmd, len = init->len;
- switch (cmd) {
- case PANEL_CMD_DELAY:
+ if (cmd == PANEL_CMD_DELAY) {
mdelay(len);
- break;
+ continue;
+ }
+ switch (cmd) {
case PANEL_CMD_DCS:
+ switch (len) {
+ case 0:
+ printk(BIOS_ERR, "%s: DCS command length 0?\n", __func__);
+ return CB_ERR;
+ case 1:
+ type = MIPI_DSI_DCS_SHORT_WRITE;
+ break;
+ case 2:
+ type = MIPI_DSI_DCS_SHORT_WRITE_PARAM;
+ break;
+ default:
+ type = MIPI_DSI_DCS_LONG_WRITE;
+ break;
+ }
+ break;
case PANEL_CMD_GENERIC:
- buf += len;
-
- cb_err_t ret = cmd_func(cmd, init->data, len);
- if (ret != CB_SUCCESS)
- return ret;
+ switch (len) {
+ case 0:
+ type = MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM;
+ break;
+ case 1:
+ type = MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM;
+ break;
+ case 2:
+ type = MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM;
+ break;
+ default:
+ type = MIPI_DSI_GENERIC_LONG_WRITE;
+ break;
+ }
break;
-
default:
printk(BIOS_ERR, "%s: Unknown command code: %d, "
"abort panel initialization.\n", __func__, cmd);
return CB_ERR;
}
+
+ cb_err_t ret = cmd_func(type, init->data, len);
+ if (ret != CB_SUCCESS)
+ return ret;
+ buf += len;
}
return CB_SUCCESS;
diff --git a/src/include/mipi/dsi.h b/src/include/mipi/dsi.h
new file mode 100644
index 0000000000..9f11490f69
--- /dev/null
+++ b/src/include/mipi/dsi.h
@@ -0,0 +1,112 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __MIPI_DSI_H__
+#define __MIPI_DSI_H__
+
+/* MIPI DSI Processor-to-Peripheral transaction types */
+enum mipi_dsi_transaction {
+ MIPI_DSI_V_SYNC_START = 0x01,
+ MIPI_DSI_V_SYNC_END = 0x11,
+ MIPI_DSI_H_SYNC_START = 0x21,
+ MIPI_DSI_H_SYNC_END = 0x31,
+
+ MIPI_DSI_COLOR_MODE_OFF = 0x02,
+ MIPI_DSI_COLOR_MODE_ON = 0x12,
+ MIPI_DSI_SHUTDOWN_PERIPHERAL = 0x22,
+ MIPI_DSI_TURN_ON_PERIPHERAL = 0x32,
+
+ MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM = 0x03,
+ MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM = 0x13,
+ MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM = 0x23,
+
+ MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM = 0x04,
+ MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM = 0x14,
+ MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM = 0x24,
+
+ MIPI_DSI_DCS_SHORT_WRITE = 0x05,
+ MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15,
+
+ MIPI_DSI_DCS_READ = 0x06,
+
+ MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE = 0x37,
+
+ MIPI_DSI_END_OF_TRANSMISSION = 0x08,
+
+ MIPI_DSI_NULL_PACKET = 0x09,
+ MIPI_DSI_BLANKING_PACKET = 0x19,
+ MIPI_DSI_GENERIC_LONG_WRITE = 0x29,
+ MIPI_DSI_DCS_LONG_WRITE = 0x39,
+
+ MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20 = 0x0c,
+ MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24 = 0x1c,
+ MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16 = 0x2c,
+
+ MIPI_DSI_PACKED_PIXEL_STREAM_30 = 0x0d,
+ MIPI_DSI_PACKED_PIXEL_STREAM_36 = 0x1d,
+ MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12 = 0x3d,
+
+ MIPI_DSI_PACKED_PIXEL_STREAM_16 = 0x0e,
+ MIPI_DSI_PACKED_PIXEL_STREAM_18 = 0x1e,
+ MIPI_DSI_PIXEL_STREAM_3BYTE_18 = 0x2e,
+ MIPI_DSI_PACKED_PIXEL_STREAM_24 = 0x3e,
+};
+
+/* MIPI DSI Peripheral-to-Processor transaction types */
+enum {
+ MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT = 0x02,
+ MIPI_DSI_RX_END_OF_TRANSMISSION = 0x08,
+ MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE = 0x11,
+ MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE = 0x12,
+ MIPI_DSI_RX_GENERIC_LONG_READ_RESPONSE = 0x1a,
+ MIPI_DSI_RX_DCS_LONG_READ_RESPONSE = 0x1c,
+ MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE = 0x21,
+ MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE = 0x22,
+};
+
+/* MIPI DCS commands */
+enum {
+ MIPI_DCS_NOP = 0x00,
+ MIPI_DCS_SOFT_RESET = 0x01,
+ MIPI_DCS_GET_DISPLAY_ID = 0x04,
+ MIPI_DCS_GET_RED_CHANNEL = 0x06,
+ MIPI_DCS_GET_GREEN_CHANNEL = 0x07,
+ MIPI_DCS_GET_BLUE_CHANNEL = 0x08,
+ MIPI_DCS_GET_DISPLAY_STATUS = 0x09,
+ MIPI_DCS_GET_POWER_MODE = 0x0A,
+ MIPI_DCS_GET_ADDRESS_MODE = 0x0B,
+ MIPI_DCS_GET_PIXEL_FORMAT = 0x0C,
+ MIPI_DCS_GET_DISPLAY_MODE = 0x0D,
+ MIPI_DCS_GET_SIGNAL_MODE = 0x0E,
+ MIPI_DCS_GET_DIAGNOSTIC_RESULT = 0x0F,
+ MIPI_DCS_ENTER_SLEEP_MODE = 0x10,
+ MIPI_DCS_EXIT_SLEEP_MODE = 0x11,
+ MIPI_DCS_ENTER_PARTIAL_MODE = 0x12,
+ MIPI_DCS_ENTER_NORMAL_MODE = 0x13,
+ MIPI_DCS_EXIT_INVERT_MODE = 0x20,
+ MIPI_DCS_ENTER_INVERT_MODE = 0x21,
+ MIPI_DCS_SET_GAMMA_CURVE = 0x26,
+ MIPI_DCS_SET_DISPLAY_OFF = 0x28,
+ MIPI_DCS_SET_DISPLAY_ON = 0x29,
+ MIPI_DCS_SET_COLUMN_ADDRESS = 0x2A,
+ MIPI_DCS_SET_PAGE_ADDRESS = 0x2B,
+ MIPI_DCS_WRITE_MEMORY_START = 0x2C,
+ MIPI_DCS_WRITE_LUT = 0x2D,
+ MIPI_DCS_READ_MEMORY_START = 0x2E,
+ MIPI_DCS_SET_PARTIAL_AREA = 0x30,
+ MIPI_DCS_SET_SCROLL_AREA = 0x33,
+ MIPI_DCS_SET_TEAR_OFF = 0x34,
+ MIPI_DCS_SET_TEAR_ON = 0x35,
+ MIPI_DCS_SET_ADDRESS_MODE = 0x36,
+ MIPI_DCS_SET_SCROLL_START = 0x37,
+ MIPI_DCS_EXIT_IDLE_MODE = 0x38,
+ MIPI_DCS_ENTER_IDLE_MODE = 0x39,
+ MIPI_DCS_SET_PIXEL_FORMAT = 0x3A,
+ MIPI_DCS_WRITE_MEMORY_CONTINUE = 0x3C,
+ MIPI_DCS_READ_MEMORY_CONTINUE = 0x3E,
+ MIPI_DCS_SET_TEAR_SCANLINE = 0x44,
+ MIPI_DCS_GET_SCANLINE = 0x45,
+ MIPI_DCS_READ_DDB_START = 0xA1,
+ MIPI_DCS_READ_DDB_CONTINUE = 0xA8,
+};
+
+#endif /* __MIPI_DSI_H__ */
diff --git a/src/include/mipi/panel.h b/src/include/mipi/panel.h
index edb6df5fdf..527af7e95c 100644
--- a/src/include/mipi/panel.h
+++ b/src/include/mipi/panel.h
@@ -4,6 +4,7 @@
#define __MIPI_PANEL_H__
#include <edid.h>
+#include <mipi/dsi.h>
#include <types.h>
/* Definitions for cmd in panel_init_command */
@@ -30,7 +31,7 @@ struct panel_serializable_data {
u8 init[]; /* A packed array of panel_init_command */
};
-typedef cb_err_t (*mipi_cmd_func_t)(enum panel_init_cmd cmd, const u8 *data, u8 len);
+typedef cb_err_t (*mipi_cmd_func_t)(enum mipi_dsi_transaction type, const u8 *data, u8 len);
/* Parse a command array and call cmd_func() for each entry. Delays get handled internally. */
cb_err_t mipi_panel_parse_init_commands(const void *buf, mipi_cmd_func_t cmd_func);
diff --git a/src/soc/mediatek/common/dsi.c b/src/soc/mediatek/common/dsi.c
index fbf3cca2ec..a4556f5200 100644
--- a/src/soc/mediatek/common/dsi.c
+++ b/src/soc/mediatek/common/dsi.c
@@ -290,7 +290,7 @@ static void mtk_dsi_start(void)
write32(&dsi0->dsi_start, 1);
}
-static bool mtk_dsi_is_read_command(u32 type)
+static bool mtk_dsi_is_read_command(enum mipi_dsi_transaction type)
{
switch (type) {
case MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM:
@@ -298,11 +298,12 @@ static bool mtk_dsi_is_read_command(u32 type)
case MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM:
case MIPI_DSI_DCS_READ:
return true;
+ default:
+ return false;
}
- return false;
}
-static void mtk_dsi_cmdq(const u8 *data, u8 len, u32 type)
+static cb_err_t mtk_dsi_cmdq(enum mipi_dsi_transaction type, const u8 *data, u8 len)
{
const u8 *tx_buf = data;
u32 config;
@@ -312,7 +313,7 @@ static void mtk_dsi_cmdq(const u8 *data, u8 len, u32 type)
printk(BIOS_ERR, "%s: cannot get DSI ready for sending commands"
" after 20ms and the panel may not work properly.\n",
__func__);
- return;
+ return CB_ERR;
}
write32(&dsi0->dsi_intsta, 0);
@@ -344,53 +345,9 @@ static void mtk_dsi_cmdq(const u8 *data, u8 len, u32 type)
if (!wait_us(400, read32(&dsi0->dsi_intsta) & CMD_DONE_INT_FLAG)) {
printk(BIOS_ERR, "%s: failed sending DSI command, "
"panel may not work.\n", __func__);
- return;
- }
-}
-
-static cb_err_t mtk_dsi_send_init_command(enum panel_init_cmd cmd, const u8 *data, u8 len)
-{
- u32 type;
-
- switch (cmd) {
- case PANEL_CMD_DCS:
- switch (len) {
- case 0:
- return CB_ERR;
- case 1:
- type = MIPI_DSI_DCS_SHORT_WRITE;
- break;
- case 2:
- type = MIPI_DSI_DCS_SHORT_WRITE_PARAM;
- break;
- default:
- type = MIPI_DSI_DCS_LONG_WRITE;
- break;
- }
- break;
-
- case PANEL_CMD_GENERIC:
- switch (len) {
- case 0:
- type = MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM;
- break;
- case 1:
- type = MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM;
- break;
- case 2:
- type = MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM;
- break;
- default:
- type = MIPI_DSI_GENERIC_LONG_WRITE;
- break;
- }
- break;
- default:
- printk(BIOS_ERR, "Unsupported MIPI panel init command: %d\n", cmd);
return CB_ERR;
}
- mtk_dsi_cmdq(data, len, type);
return CB_SUCCESS;
}
@@ -420,7 +377,7 @@ int mtk_dsi_init(u32 mode_flags, u32 format, u32 lanes, const struct edid *edid,
mtk_dsi_clk_hs_mode_disable();
mtk_dsi_config_vdo_timing(mode_flags, format, lanes, edid, &phy_timing);
mtk_dsi_clk_hs_mode_enable();
- mipi_panel_parse_init_commands(init_commands, mtk_dsi_send_init_command);
+ mipi_panel_parse_init_commands(init_commands, mtk_dsi_cmdq);
mtk_dsi_set_mode(mode_flags);
mtk_dsi_start();
diff --git a/src/soc/mediatek/common/include/soc/dsi_common.h b/src/soc/mediatek/common/include/soc/dsi_common.h
index 31abce026c..bc4bfa17a6 100644
--- a/src/soc/mediatek/common/include/soc/dsi_common.h
+++ b/src/soc/mediatek/common/include/soc/dsi_common.h
@@ -5,6 +5,7 @@
#include <commonlib/helpers.h>
#include <edid.h>
+#include <mipi/dsi.h>
#include <types.h>
#include <soc/addressmap.h>
@@ -212,112 +213,6 @@ enum {
DSI_FORCE_COMMIT_ALWAYS = BIT(1),
};
-/* MIPI DSI Processor-to-Peripheral transaction types */
-enum {
- MIPI_DSI_V_SYNC_START = 0x01,
- MIPI_DSI_V_SYNC_END = 0x11,
- MIPI_DSI_H_SYNC_START = 0x21,
- MIPI_DSI_H_SYNC_END = 0x31,
-
- MIPI_DSI_COLOR_MODE_OFF = 0x02,
- MIPI_DSI_COLOR_MODE_ON = 0x12,
- MIPI_DSI_SHUTDOWN_PERIPHERAL = 0x22,
- MIPI_DSI_TURN_ON_PERIPHERAL = 0x32,
-
- MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM = 0x03,
- MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM = 0x13,
- MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM = 0x23,
-
- MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM = 0x04,
- MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM = 0x14,
- MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM = 0x24,
-
- MIPI_DSI_DCS_SHORT_WRITE = 0x05,
- MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15,
-
- MIPI_DSI_DCS_READ = 0x06,
-
- MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE = 0x37,
-
- MIPI_DSI_END_OF_TRANSMISSION = 0x08,
-
- MIPI_DSI_NULL_PACKET = 0x09,
- MIPI_DSI_BLANKING_PACKET = 0x19,
- MIPI_DSI_GENERIC_LONG_WRITE = 0x29,
- MIPI_DSI_DCS_LONG_WRITE = 0x39,
-
- MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20 = 0x0c,
- MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24 = 0x1c,
- MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16 = 0x2c,
-
- MIPI_DSI_PACKED_PIXEL_STREAM_30 = 0x0d,
- MIPI_DSI_PACKED_PIXEL_STREAM_36 = 0x1d,
- MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12 = 0x3d,
-
- MIPI_DSI_PACKED_PIXEL_STREAM_16 = 0x0e,
- MIPI_DSI_PACKED_PIXEL_STREAM_18 = 0x1e,
- MIPI_DSI_PIXEL_STREAM_3BYTE_18 = 0x2e,
- MIPI_DSI_PACKED_PIXEL_STREAM_24 = 0x3e,
-};
-
-/* MIPI DSI Peripheral-to-Processor transaction types */
-enum {
- MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT = 0x02,
- MIPI_DSI_RX_END_OF_TRANSMISSION = 0x08,
- MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE = 0x11,
- MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE = 0x12,
- MIPI_DSI_RX_GENERIC_LONG_READ_RESPONSE = 0x1a,
- MIPI_DSI_RX_DCS_LONG_READ_RESPONSE = 0x1c,
- MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE = 0x21,
- MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE = 0x22,
-};
-
-/* MIPI DCS commands */
-enum {
- MIPI_DCS_NOP = 0x00,
- MIPI_DCS_SOFT_RESET = 0x01,
- MIPI_DCS_GET_DISPLAY_ID = 0x04,
- MIPI_DCS_GET_RED_CHANNEL = 0x06,
- MIPI_DCS_GET_GREEN_CHANNEL = 0x07,
- MIPI_DCS_GET_BLUE_CHANNEL = 0x08,
- MIPI_DCS_GET_DISPLAY_STATUS = 0x09,
- MIPI_DCS_GET_POWER_MODE = 0x0A,
- MIPI_DCS_GET_ADDRESS_MODE = 0x0B,
- MIPI_DCS_GET_PIXEL_FORMAT = 0x0C,
- MIPI_DCS_GET_DISPLAY_MODE = 0x0D,
- MIPI_DCS_GET_SIGNAL_MODE = 0x0E,
- MIPI_DCS_GET_DIAGNOSTIC_RESULT = 0x0F,
- MIPI_DCS_ENTER_SLEEP_MODE = 0x10,
- MIPI_DCS_EXIT_SLEEP_MODE = 0x11,
- MIPI_DCS_ENTER_PARTIAL_MODE = 0x12,
- MIPI_DCS_ENTER_NORMAL_MODE = 0x13,
- MIPI_DCS_EXIT_INVERT_MODE = 0x20,
- MIPI_DCS_ENTER_INVERT_MODE = 0x21,
- MIPI_DCS_SET_GAMMA_CURVE = 0x26,
- MIPI_DCS_SET_DISPLAY_OFF = 0x28,
- MIPI_DCS_SET_DISPLAY_ON = 0x29,
- MIPI_DCS_SET_COLUMN_ADDRESS = 0x2A,
- MIPI_DCS_SET_PAGE_ADDRESS = 0x2B,
- MIPI_DCS_WRITE_MEMORY_START = 0x2C,
- MIPI_DCS_WRITE_LUT = 0x2D,
- MIPI_DCS_READ_MEMORY_START = 0x2E,
- MIPI_DCS_SET_PARTIAL_AREA = 0x30,
- MIPI_DCS_SET_SCROLL_AREA = 0x33,
- MIPI_DCS_SET_TEAR_OFF = 0x34,
- MIPI_DCS_SET_TEAR_ON = 0x35,
- MIPI_DCS_SET_ADDRESS_MODE = 0x36,
- MIPI_DCS_SET_SCROLL_START = 0x37,
- MIPI_DCS_EXIT_IDLE_MODE = 0x38,
- MIPI_DCS_ENTER_IDLE_MODE = 0x39,
- MIPI_DCS_SET_PIXEL_FORMAT = 0x3A,
- MIPI_DCS_WRITE_MEMORY_CONTINUE = 0x3C,
- MIPI_DCS_READ_MEMORY_CONTINUE = 0x3E,
- MIPI_DCS_SET_TEAR_SCANLINE = 0x44,
- MIPI_DCS_GET_SCANLINE = 0x45,
- MIPI_DCS_READ_DDB_START = 0xA1,
- MIPI_DCS_READ_DDB_CONTINUE = 0xA8,
-};
-
struct mtk_phy_timing {
u8 lpx;
u8 da_hs_prepare;
diff --git a/src/soc/nvidia/tegra210/include/soc/mipi_display.h b/src/soc/nvidia/tegra210/include/soc/mipi_display.h
index c19079db61..e5c7596b97 100644
--- a/src/soc/nvidia/tegra210/include/soc/mipi_display.h
+++ b/src/soc/nvidia/tegra210/include/soc/mipi_display.h
@@ -5,114 +5,10 @@
*
* Author: Imre Deak <imre.deak@nokia.com>
*/
-#ifndef MIPI_DISPLAY_H
-#define MIPI_DISPLAY_H
+#ifndef __SOC_MIPI_DISPLAY_H__
+#define __SOC_MIPI_DISPLAY_H__
-/* MIPI DSI Processor-to-Peripheral transaction types */
-enum {
- MIPI_DSI_V_SYNC_START = 0x01,
- MIPI_DSI_V_SYNC_END = 0x11,
- MIPI_DSI_H_SYNC_START = 0x21,
- MIPI_DSI_H_SYNC_END = 0x31,
-
- MIPI_DSI_COLOR_MODE_OFF = 0x02,
- MIPI_DSI_COLOR_MODE_ON = 0x12,
- MIPI_DSI_SHUTDOWN_PERIPHERAL = 0x22,
- MIPI_DSI_TURN_ON_PERIPHERAL = 0x32,
-
- MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM = 0x03,
- MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM = 0x13,
- MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM = 0x23,
-
- MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM = 0x04,
- MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM = 0x14,
- MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM = 0x24,
-
- MIPI_DSI_DCS_SHORT_WRITE = 0x05,
- MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15,
-
- MIPI_DSI_DCS_READ = 0x06,
-
- MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE = 0x37,
-
- MIPI_DSI_END_OF_TRANSMISSION = 0x08,
-
- MIPI_DSI_NULL_PACKET = 0x09,
- MIPI_DSI_BLANKING_PACKET = 0x19,
- MIPI_DSI_GENERIC_LONG_WRITE = 0x29,
- MIPI_DSI_DCS_LONG_WRITE = 0x39,
-
- MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20 = 0x0c,
- MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24 = 0x1c,
- MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16 = 0x2c,
-
- MIPI_DSI_PACKED_PIXEL_STREAM_30 = 0x0d,
- MIPI_DSI_PACKED_PIXEL_STREAM_36 = 0x1d,
- MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12 = 0x3d,
-
- MIPI_DSI_PACKED_PIXEL_STREAM_16 = 0x0e,
- MIPI_DSI_PACKED_PIXEL_STREAM_18 = 0x1e,
- MIPI_DSI_PIXEL_STREAM_3BYTE_18 = 0x2e,
- MIPI_DSI_PACKED_PIXEL_STREAM_24 = 0x3e,
-};
-
-/* MIPI DSI Peripheral-to-Processor transaction types */
-enum {
- MIPI_DSI_RX_ACKNOWLEDGE_AND_ERROR_REPORT = 0x02,
- MIPI_DSI_RX_END_OF_TRANSMISSION = 0x08,
- MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_1BYTE = 0x11,
- MIPI_DSI_RX_GENERIC_SHORT_READ_RESPONSE_2BYTE = 0x12,
- MIPI_DSI_RX_GENERIC_LONG_READ_RESPONSE = 0x1a,
- MIPI_DSI_RX_DCS_LONG_READ_RESPONSE = 0x1c,
- MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_1BYTE = 0x21,
- MIPI_DSI_RX_DCS_SHORT_READ_RESPONSE_2BYTE = 0x22,
-};
-
-/* MIPI DCS commands */
-enum {
- MIPI_DCS_NOP = 0x00,
- MIPI_DCS_SOFT_RESET = 0x01,
- MIPI_DCS_GET_DISPLAY_ID = 0x04,
- MIPI_DCS_GET_RED_CHANNEL = 0x06,
- MIPI_DCS_GET_GREEN_CHANNEL = 0x07,
- MIPI_DCS_GET_BLUE_CHANNEL = 0x08,
- MIPI_DCS_GET_DISPLAY_STATUS = 0x09,
- MIPI_DCS_GET_POWER_MODE = 0x0A,
- MIPI_DCS_GET_ADDRESS_MODE = 0x0B,
- MIPI_DCS_GET_PIXEL_FORMAT = 0x0C,
- MIPI_DCS_GET_DISPLAY_MODE = 0x0D,
- MIPI_DCS_GET_SIGNAL_MODE = 0x0E,
- MIPI_DCS_GET_DIAGNOSTIC_RESULT = 0x0F,
- MIPI_DCS_ENTER_SLEEP_MODE = 0x10,
- MIPI_DCS_EXIT_SLEEP_MODE = 0x11,
- MIPI_DCS_ENTER_PARTIAL_MODE = 0x12,
- MIPI_DCS_ENTER_NORMAL_MODE = 0x13,
- MIPI_DCS_EXIT_INVERT_MODE = 0x20,
- MIPI_DCS_ENTER_INVERT_MODE = 0x21,
- MIPI_DCS_SET_GAMMA_CURVE = 0x26,
- MIPI_DCS_SET_DISPLAY_OFF = 0x28,
- MIPI_DCS_SET_DISPLAY_ON = 0x29,
- MIPI_DCS_SET_COLUMN_ADDRESS = 0x2A,
- MIPI_DCS_SET_PAGE_ADDRESS = 0x2B,
- MIPI_DCS_WRITE_MEMORY_START = 0x2C,
- MIPI_DCS_WRITE_LUT = 0x2D,
- MIPI_DCS_READ_MEMORY_START = 0x2E,
- MIPI_DCS_SET_PARTIAL_AREA = 0x30,
- MIPI_DCS_SET_SCROLL_AREA = 0x33,
- MIPI_DCS_SET_TEAR_OFF = 0x34,
- MIPI_DCS_SET_TEAR_ON = 0x35,
- MIPI_DCS_SET_ADDRESS_MODE = 0x36,
- MIPI_DCS_SET_SCROLL_START = 0x37,
- MIPI_DCS_EXIT_IDLE_MODE = 0x38,
- MIPI_DCS_ENTER_IDLE_MODE = 0x39,
- MIPI_DCS_SET_PIXEL_FORMAT = 0x3A,
- MIPI_DCS_WRITE_MEMORY_CONTINUE = 0x3C,
- MIPI_DCS_READ_MEMORY_CONTINUE = 0x3E,
- MIPI_DCS_SET_TEAR_SCANLINE = 0x44,
- MIPI_DCS_GET_SCANLINE = 0x45,
- MIPI_DCS_READ_DDB_START = 0xA1,
- MIPI_DCS_READ_DDB_CONTINUE = 0xA8,
-};
+#include <mipi/dsi.h>
/* MIPI DCS pixel formats */
#define MIPI_DCS_PIXEL_FMT_24BIT 7
@@ -122,4 +18,4 @@ enum {
#define MIPI_DCS_PIXEL_FMT_8BIT 2
#define MIPI_DCS_PIXEL_FMT_3BIT 1
-#endif
+#endif /* __SOC_MIPI_DISPLAY_H__ */
diff --git a/src/soc/nvidia/tegra210/include/soc/mipi_dsi.h b/src/soc/nvidia/tegra210/include/soc/mipi_dsi.h
index deeadc3a92..9533c0f5a1 100644
--- a/src/soc/nvidia/tegra210/include/soc/mipi_dsi.h
+++ b/src/soc/nvidia/tegra210/include/soc/mipi_dsi.h
@@ -5,8 +5,8 @@
* Andrzej Hajda <a.hajda@samsung.com>
*/
-#ifndef __MIPI_DSI_H__
-#define __MIPI_DSI_H__
+#ifndef __SOC_MIPI_DSI_H__
+#define __SOC_MIPI_DSI_H__
#include <types.h>
@@ -279,4 +279,4 @@ struct tegra_mipi_device {
struct tegra_mipi_device *tegra_mipi_request(struct tegra_mipi_device *device,
int device_index);
int tegra_mipi_calibrate(struct tegra_mipi_device *device);
-#endif /* __MIPI_DSI_H__ */
+#endif /* __SOC_MIPI_DSI_H__ */
diff --git a/src/soc/qualcomm/sc7180/display/dsi.c b/src/soc/qualcomm/sc7180/display/dsi.c
index e9bd702159..15d36ed0b8 100644
--- a/src/soc/qualcomm/sc7180/display/dsi.c
+++ b/src/soc/qualcomm/sc7180/display/dsi.c
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <mipi/dsi.h>
#include <mipi/panel.h>
#include <device/mmio.h>
#include <console/console.h>
@@ -210,7 +211,7 @@ static int mdss_dsi_cmd_dma_trigger_for_panel(void)
return status;
}
-static cb_err_t mdss_dsi_send_init_cmd(enum panel_init_cmd cmd, const u8 *body, u8 len)
+static cb_err_t mdss_dsi_send_init_cmd(enum mipi_dsi_transaction type, const u8 *body, u8 len)
{
uint8_t *pload = _dma_coherent;
uint32_t size;
@@ -218,14 +219,24 @@ static cb_err_t mdss_dsi_send_init_cmd(enum panel_init_cmd cmd, const u8 *body,
int data = 0;
uint32_t *bp = NULL;
- /* This implementation only supports DCS commands (I think?). */
- assert(cmd == PANEL_CMD_DCS);
-
- /* The payload size has to be a multiple of 4 */
- memcpy(pload, body, len);
- size = ALIGN_UP(len, DSI_PAYLOAD_SIZE_ALIGN);
- memset(pload + len, 0xff, size - len);
- assert(size < DSI_PAYLOAD_BYTE_BOUND);
+ if (len > 2) {
+ pload[0] = len;
+ pload[1] = 0;
+ pload[2] = type;
+ pload[3] = BIT(7) | BIT(6);
+
+ /* The payload size has to be a multiple of 4 */
+ memcpy(pload + 4, body, len);
+ size = ALIGN_UP(len + 4, DSI_PAYLOAD_SIZE_ALIGN);
+ memset(pload + 4 + len, 0, size - 4 - len);
+ assert(size < DSI_PAYLOAD_BYTE_BOUND);
+ } else {
+ pload[0] = body[0];
+ pload[1] = len > 1 ? body[1] : 0;
+ pload[2] = type;
+ pload[3] = BIT(7);
+ size = 4;
+ }
bp = (uint32_t *)pload;
diff --git a/src/soc/rockchip/rk3399/include/soc/mipi.h b/src/soc/rockchip/rk3399/include/soc/mipi.h
index 46077cb301..f5bd797850 100644
--- a/src/soc/rockchip/rk3399/include/soc/mipi.h
+++ b/src/soc/rockchip/rk3399/include/soc/mipi.h
@@ -3,6 +3,7 @@
#ifndef __RK_MIPI_H
#define __RK_MIPI_H
+#include <mipi/dsi.h>
#include <types.h>
struct rk_mipi_regs {
@@ -250,11 +251,6 @@ check_member(rk_mipi_regs, dsi_int_msk1, 0xc8);
#define GEN_PLD_R_FULL BIT(5)
#define GEN_RD_CMD_BUSY BIT(6)
-#define MIPI_DSI_DCS_SHORT_WRITE 0x05
-#define MIPI_DSI_DCS_SHORT_WRITE_PARAM 0x15
-#define MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM 0x23
-#define MIPI_DSI_DCS_LONG_WRITE 0x39
-
#define MIPI_INIT_CMD(...) { \
.len = sizeof((char[]){__VA_ARGS__}), \
.data = (char[]){__VA_ARGS__} }
@@ -293,12 +289,6 @@ enum rk_mipi_dsi_mode {
MIPI_DSI_VID_MODE,
};
-enum {
- MIPI_DCS_NOP = 0x00,
- MIPI_DCS_EXIT_SLEEP_MODE = 0x11,
- MIPI_DCS_SET_DISPLAY_ON = 0x29,
-};
-
struct dphy_pll_parameter_map {
unsigned int max_mbps;
u8 hsfreqrange;
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-27 14:27:10 +0000