diff options
| -rw-r--r-- | src/soc/intel/alderlake/chip.h | 7 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/romstage/fsp_params.c | 3 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h index b6b61cda13..f4cab6fe6a 100644 --- a/src/soc/intel/alderlake/chip.h +++ b/src/soc/intel/alderlake/chip.h @@ -730,6 +730,13 @@ struct soc_intel_alderlake_config { * Set this to 1 in order to disable Tccold Handshake */ bool disable_dynamic_tccold_handshake; + + /* + * Enable or Disable Reduced BasicMemoryTest size. + * Default is set to 0. + * Set this to 1 in order to reduce BasicMemoryTest size + */ + bool lower_basic_mem_test_size; }; typedef struct soc_intel_alderlake_config config_t; diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c index 50343fb7a7..1326cb5c1a 100644 --- a/src/soc/intel/alderlake/romstage/fsp_params.c +++ b/src/soc/intel/alderlake/romstage/fsp_params.c @@ -158,6 +158,9 @@ static void fill_fspm_mrc_params(FSP_M_CONFIG *m_cfg, m_cfg->DdrFreqLimit = config->max_dram_speed_mts; m_cfg->DdrSpeedControl = 1; } +#if CONFIG(SOC_INTEL_RAPTORLAKE) + m_cfg->LowerBasicMemTestSize = config->lower_basic_mem_test_size; +#endif } static void fill_fspm_cpu_params(FSP_M_CONFIG *m_cfg, |