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-rw-r--r--src/mainboard/google/brya/variants/brask/overridetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/gaelin/overridetree.cb1
-rw-r--r--src/mainboard/google/brya/variants/kuldax/overridetree.cb2
-rw-r--r--src/mainboard/google/brya/variants/moli/overridetree.cb1
4 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/brask/overridetree.cb b/src/mainboard/google/brya/variants/brask/overridetree.cb
index 88c73adce7..6c66d797c8 100644
--- a/src/mainboard/google/brya/variants/brask/overridetree.cb
+++ b/src/mainboard/google/brya/variants/brask/overridetree.cb
@@ -6,6 +6,8 @@ fw_config
end
chip soc/intel/alderlake
+ register "sagv" = "SaGv_Enabled"
+
device domain 0 on
device ref dtt on
chip drivers/intel/dptf
diff --git a/src/mainboard/google/brya/variants/gaelin/overridetree.cb b/src/mainboard/google/brya/variants/gaelin/overridetree.cb
index 4f2c04a57a..caa874b26b 100644
--- a/src/mainboard/google/brya/variants/gaelin/overridetree.cb
+++ b/src/mainboard/google/brya/variants/gaelin/overridetree.cb
@@ -1,4 +1,5 @@
chip soc/intel/alderlake
+ register "sagv" = "SaGv_Enabled"
device domain 0 on
end
diff --git a/src/mainboard/google/brya/variants/kuldax/overridetree.cb b/src/mainboard/google/brya/variants/kuldax/overridetree.cb
index 84712724f8..fdf37d5b81 100644
--- a/src/mainboard/google/brya/variants/kuldax/overridetree.cb
+++ b/src/mainboard/google/brya/variants/kuldax/overridetree.cb
@@ -6,6 +6,8 @@ fw_config
end
chip soc/intel/alderlake
+ register "sagv" = "SaGv_Enabled"
+
register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2 Port 1
register "usb2_ports[2]" = "USB2_PORT_EMPTY" # Disable USB2 Port 2
register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable USB2 Port 4
diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb
index 2d35e14112..5612b6ef71 100644
--- a/src/mainboard/google/brya/variants/moli/overridetree.cb
+++ b/src/mainboard/google/brya/variants/moli/overridetree.cb
@@ -14,6 +14,7 @@ fw_config
end
end
chip soc/intel/alderlake
+ register "sagv" = "SaGv_Enabled"
# Enable HDMI2 in PortA, HDMI1 in PortB, HDMI/DP in Port2
register "ddi_ports_config" = "{
[DDI_PORT_A] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,