diff options
| -rw-r--r-- | src/vendorcode/google/chromeos/vboot2/Kconfig | 7 | ||||
| -rw-r--r-- | src/vendorcode/google/chromeos/vboot2/verstage.c | 2 |
2 files changed, 9 insertions, 0 deletions
diff --git a/src/vendorcode/google/chromeos/vboot2/Kconfig b/src/vendorcode/google/chromeos/vboot2/Kconfig index c5c46e5843..33c33a5e7c 100644 --- a/src/vendorcode/google/chromeos/vboot2/Kconfig +++ b/src/vendorcode/google/chromeos/vboot2/Kconfig @@ -65,6 +65,13 @@ config RETURN_FROM_VERSTAGE reused by the succeeding stage. This is useful if a ram space is too small to fit both the verstage and the succeeding stage. +config CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL + bool "The chipset provides the main() entry point for verstage" + default n + depends on SEPARATE_VERSTAGE + help + The chipset code provides their own main() entry point. + # These VBOOT_X_INDEX are the position of X in FW_MAIN_A/B region. The index # table is created by cros_bundle_firmware at build time based on the positions # of the blobs listed in fmap.dts and stored at the top of FW_MAIN_A/B region. diff --git a/src/vendorcode/google/chromeos/vboot2/verstage.c b/src/vendorcode/google/chromeos/vboot2/verstage.c index 955635992f..751f588292 100644 --- a/src/vendorcode/google/chromeos/vboot2/verstage.c +++ b/src/vendorcode/google/chromeos/vboot2/verstage.c @@ -42,5 +42,7 @@ void verstage(void) } } +#if !IS_ENABLED(CONFIG_CHIPSET_PROVIDES_VERSTAGE_MAIN_SYMBOL) /* This is for boards that rely on main() for an entry point of a stage. */ void main(void) __attribute__((alias ("verstage"))); +#endif |