diff options
| -rw-r--r-- | src/arch/x86/Kconfig | 10 | ||||
| -rw-r--r-- | src/arch/x86/include/arch/cpu.h | 2 | ||||
| -rw-r--r-- | src/cpu/intel/common/Kconfig | 1 |
3 files changed, 12 insertions, 1 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 8676fad863..c97fecb3e4 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -92,6 +92,16 @@ config ARCH_X86_64_PGTBL_LOC The position where to place pagetables. Needs to be known at compile time. Must not overlap other files in CBFS. +config RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT + bool + help + On some systems, the upper physical address bits are reserved and + used as a tag which is typically related to a memory encryption + feature. When selecting this option, the SoC code needs to implement + get_reserved_phys_addr_bits so that the common code knows how many of + the most significant physical address bits are reserved and can't be + used as address bits. + # This is an SMP option. It relates to starting up APs. # It is usually set in mainboard/*/Kconfig. # TODO: Improve description. diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index b24cd23a96..2c98d1e98f 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -316,7 +316,7 @@ size_t get_cache_size(const struct cpu_cache_info *info); */ bool fill_cpu_cache_info(uint8_t level, struct cpu_cache_info *info); -#if CONFIG(CPU_INTEL_COMMON) +#if CONFIG(RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT) unsigned int get_reserved_phys_addr_bits(void); #else /* Default implementation */ diff --git a/src/cpu/intel/common/Kconfig b/src/cpu/intel/common/Kconfig index 7f9033cf65..51b8ccb83f 100644 --- a/src/cpu/intel/common/Kconfig +++ b/src/cpu/intel/common/Kconfig @@ -1,5 +1,6 @@ config CPU_INTEL_COMMON bool + select RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT if CPU_INTEL_COMMON |