diff options
| -rw-r--r-- | src/soc/amd/genoa_poc/chip.c | 2 | ||||
| -rw-r--r-- | src/vendorcode/amd/opensil/genoa_poc/opensil.h | 5 | ||||
| -rw-r--r-- | src/vendorcode/amd/opensil/genoa_poc/ramstage.c | 17 |
3 files changed, 20 insertions, 4 deletions
diff --git a/src/soc/amd/genoa_poc/chip.c b/src/soc/amd/genoa_poc/chip.c index d397800ec1..13ede840e5 100644 --- a/src/soc/amd/genoa_poc/chip.c +++ b/src/soc/amd/genoa_poc/chip.c @@ -11,7 +11,7 @@ static void soc_init(void *chip_info) default_dev_ops_root.write_acpi_tables = soc_acpi_write_tables; setup_opensil(); - opensil_entry(SIL_TP1); + opensil_xSIM_timepoint_1(); fch_init(chip_info); } diff --git a/src/vendorcode/amd/opensil/genoa_poc/opensil.h b/src/vendorcode/amd/opensil/genoa_poc/opensil.h index e22552233b..334903ff2e 100644 --- a/src/vendorcode/amd/opensil/genoa_poc/opensil.h +++ b/src/vendorcode/amd/opensil/genoa_poc/opensil.h @@ -4,7 +4,6 @@ #define _OPENSIL_H_ #include <acpi/acpi.h> -#include <xSIM-api.h> void SIL_STATUS_report(const char *function, const int status); // Add the memory map to dev, starting at index idx, returns last use idx @@ -15,6 +14,8 @@ void opensil_fill_fadt_io_ports(acpi_fadt_t *fadt); void configure_mpio(void); void setup_opensil(void); -void opensil_entry(SIL_TIMEPOINT timepoint); +void opensil_xSIM_timepoint_1(void); +void opensil_xSIM_timepoint_2(void); +void opensil_xSIM_timepoint_3(void); #endif diff --git a/src/vendorcode/amd/opensil/genoa_poc/ramstage.c b/src/vendorcode/amd/opensil/genoa_poc/ramstage.c index 11289bb81b..758b2841fd 100644 --- a/src/vendorcode/amd/opensil/genoa_poc/ramstage.c +++ b/src/vendorcode/amd/opensil/genoa_poc/ramstage.c @@ -129,7 +129,7 @@ void setup_opensil(void) configure_mpio(); } -void opensil_entry(SIL_TIMEPOINT timepoint) +static void opensil_entry(SIL_TIMEPOINT timepoint) { SIL_STATUS ret; SIL_TIMEPOINT tp = (uintptr_t)timepoint; @@ -160,4 +160,19 @@ void opensil_entry(SIL_TIMEPOINT timepoint) } } +void opensil_xSIM_timepoint_1(void) +{ + opensil_entry(SIL_TP1); +} + +void opensil_xSIM_timepoint_2(void) +{ + opensil_entry(SIL_TP2); +} + +void opensil_xSIM_timepoint_3(void) +{ + opensil_entry(SIL_TP3); +} + /* TODO: also call timepoints 2 and 3 from coreboot. Are they NOOP? */ |