diff options
| -rw-r--r-- | src/soc/intel/broadwell/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/include/soc/device_nvs.h | 24 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/include/soc/pch.h | 21 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/pch/acpi.c | 42 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/pch/adsp.c | 14 | ||||
| -rw-r--r-- | src/soc/intel/broadwell/pch/serialio.c | 67 |
6 files changed, 79 insertions, 90 deletions
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index c77109d552..593b13ae64 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -11,7 +11,6 @@ config INTEL_LYNXPOINT_LP config SOC_SPECIFIC_OPTIONS def_bool y - select ACPI_HAS_DEVICE_NVS select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_SOC_NVS select AZALIA_PLUGIN_SUPPORT diff --git a/src/soc/intel/broadwell/include/soc/device_nvs.h b/src/soc/intel/broadwell/include/soc/device_nvs.h deleted file mode 100644 index 27304b573d..0000000000 --- a/src/soc/intel/broadwell/include/soc/device_nvs.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef _BROADWELL_DEVICE_NVS_H_ -#define _BROADWELL_DEVICE_NVS_H_ - -#include <stdint.h> - -#define SIO_NVS_DMA 0 -#define SIO_NVS_I2C0 1 -#define SIO_NVS_I2C1 2 -#define SIO_NVS_SPI0 3 -#define SIO_NVS_SPI1 4 -#define SIO_NVS_UART0 5 -#define SIO_NVS_UART1 6 -#define SIO_NVS_SDIO 7 -#define SIO_NVS_ADSP 8 - -struct __packed device_nvs { - u8 enable[9]; - u32 bar0[9]; - u32 bar1[9]; -}; - -#endif diff --git a/src/soc/intel/broadwell/include/soc/pch.h b/src/soc/intel/broadwell/include/soc/pch.h index 8089f5bdb0..8367a39b7f 100644 --- a/src/soc/intel/broadwell/include/soc/pch.h +++ b/src/soc/intel/broadwell/include/soc/pch.h @@ -4,6 +4,7 @@ #define _BROADWELL_PCH_H_ #include <acpi/acpi.h> +#include <types.h> /* Haswell ULT Pch (LynxPoint-LP) */ #define PCH_LPT_LP_SAMPLE 0x9c41 @@ -25,6 +26,25 @@ #define PCH_PCS 0x84 #define PCH_PCS_PS_D3HOT 3 +enum pch_acpi_device { + PCH_ACPI_SDMA = 0, + PCH_ACPI_I2C0, + PCH_ACPI_I2C1, + PCH_ACPI_GSPI0, + PCH_ACPI_GSPI1, + PCH_ACPI_UART0, + PCH_ACPI_UART1, + PCH_ACPI_SDIO, + PCH_ACPI_ADSP, + NUM_PCH_ACPI_DEVICES, +}; + +struct pch_acpi_device_state { + bool enable; + uint32_t bar0; + uint32_t bar1; +}; + u8 pch_revision(void); u16 pch_type(void); int pch_is_wpt(void); @@ -32,6 +52,7 @@ int pch_is_wpt_ulx(void); u32 pch_read_soft_strap(int id); void pch_disable_devfn(struct device *dev); +struct pch_acpi_device_state *get_acpi_device_state(enum pch_acpi_device dev_index); void acpi_create_serialio_ssdt(acpi_header_t *ssdt); void broadwell_pch_finalize(void); diff --git a/src/soc/intel/broadwell/pch/acpi.c b/src/soc/intel/broadwell/pch/acpi.c index 85726b06e4..8c435d6f47 100644 --- a/src/soc/intel/broadwell/pch/acpi.c +++ b/src/soc/intel/broadwell/pch/acpi.c @@ -1,9 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <acpi/acpi.h> -#include <acpi/acpi_gnvs.h> #include <acpi/acpigen.h> -#include <soc/device_nvs.h> +#include <assert.h> #include <soc/pch.h> #include <types.h> #include <version.h> @@ -55,25 +54,32 @@ static void acpi_write_serialio_psx_methods(const char *const name, const uint32 acpigen_pop_len(); } -static void acpi_create_serialio_ssdt_entry(int sio_index, struct device_nvs *dev_nvs) +static struct pch_acpi_device_state device_state[NUM_PCH_ACPI_DEVICES] = { 0 }; + +struct pch_acpi_device_state *get_acpi_device_state(enum pch_acpi_device dev_index) { - const char idx = '0' + sio_index; + assert(dev_index < ARRAY_SIZE(device_state)); + return &device_state[dev_index]; +} + +static void acpi_create_serialio_ssdt_entry(enum pch_acpi_device dev_index) +{ + const struct pch_acpi_device_state *state = get_acpi_device_state(dev_index); + + const char idx = '0' + dev_index; const char sxen[5] = { 'S', idx, 'E', 'N', '\0' }; - acpigen_write_name_byte(sxen, dev_nvs->enable[sio_index]); + acpigen_write_name_byte(sxen, state->enable); const char sxb0[5] = { 'S', idx, 'B', '0', '\0' }; - acpigen_write_name_dword(sxb0, dev_nvs->bar0[sio_index]); + acpigen_write_name_dword(sxb0, state->bar0); const char sxb1[5] = { 'S', idx, 'B', '1', '\0' }; - acpigen_write_name_dword(sxb1, dev_nvs->bar1[sio_index]); + acpigen_write_name_dword(sxb1, state->bar1); } void acpi_create_serialio_ssdt(acpi_header_t *ssdt) { unsigned long current = (unsigned long)ssdt + sizeof(acpi_header_t); - struct device_nvs *dev_nvs = acpi_get_device_nvs(); - if (!dev_nvs) - return; /* Fill the SSDT header */ memset((void *)ssdt, 0, sizeof(acpi_header_t)); @@ -88,17 +94,17 @@ void acpi_create_serialio_ssdt(acpi_header_t *ssdt) acpigen_set_current((char *)current); /* Fill the SSDT with an entry for each SerialIO device */ - for (int id = 0; id < 9; id++) - acpi_create_serialio_ssdt_entry(id, dev_nvs); + for (enum pch_acpi_device dev_index = 0; dev_index < NUM_PCH_ACPI_DEVICES; dev_index++) + acpi_create_serialio_ssdt_entry(dev_index); acpigen_write_scope("\\_SB.PCI0"); { - acpi_write_serialio_psx_methods("I2C0", dev_nvs->bar1[SIO_NVS_I2C0]); - acpi_write_serialio_psx_methods("I2C1", dev_nvs->bar1[SIO_NVS_I2C1]); - acpi_write_serialio_psx_methods("SPI0", dev_nvs->bar1[SIO_NVS_SPI0]); - acpi_write_serialio_psx_methods("SPI1", dev_nvs->bar1[SIO_NVS_SPI1]); - acpi_write_serialio_psx_methods("UAR0", dev_nvs->bar1[SIO_NVS_UART0]); - acpi_write_serialio_psx_methods("UAR1", dev_nvs->bar1[SIO_NVS_UART1]); + acpi_write_serialio_psx_methods("I2C0", device_state[PCH_ACPI_I2C0].bar1); + acpi_write_serialio_psx_methods("I2C1", device_state[PCH_ACPI_I2C1].bar1); + acpi_write_serialio_psx_methods("SPI0", device_state[PCH_ACPI_GSPI0].bar1); + acpi_write_serialio_psx_methods("SPI1", device_state[PCH_ACPI_GSPI1].bar1); + acpi_write_serialio_psx_methods("UAR0", device_state[PCH_ACPI_UART0].bar1); + acpi_write_serialio_psx_methods("UAR1", device_state[PCH_ACPI_UART1].bar1); } acpigen_pop_len(); diff --git a/src/soc/intel/broadwell/pch/adsp.c b/src/soc/intel/broadwell/pch/adsp.c index 040bba150e..b4b0257c11 100644 --- a/src/soc/intel/broadwell/pch/adsp.c +++ b/src/soc/intel/broadwell/pch/adsp.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <acpi/acpi_gnvs.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> @@ -8,8 +7,6 @@ #include <device/pci_ops.h> #include <device/mmio.h> #include <soc/adsp.h> -#include <soc/device_nvs.h> -#include <soc/device_nvs.h> #include <soc/pch.h> #include <soc/ramstage.h> #include <soc/rcba.h> @@ -79,15 +76,14 @@ static void adsp_init(struct device *dev) pch_iobp_write(ADSP_IOBP_PMCTL, ADSP_PMCTL_VALUE); if (config->sio_acpi_mode) { - struct device_nvs *dev_nvs = acpi_get_device_nvs(); - /* Configure for ACPI mode */ printk(BIOS_INFO, "ADSP: Enable ACPI Mode IRQ3\n"); - /* Save BAR0 and BAR1 to ACPI NVS */ - dev_nvs->bar0[SIO_NVS_ADSP] = (u32)bar0->base; - dev_nvs->bar1[SIO_NVS_ADSP] = (u32)bar1->base; - dev_nvs->enable[SIO_NVS_ADSP] = 1; + /* Save BAR0 and BAR1 */ + struct pch_acpi_device_state *state = get_acpi_device_state(PCH_ACPI_ADSP); + state->enable = 1; + state->bar0 = (u32)bar0->base; + state->bar1 = (u32)bar1->base; /* Set PCI Config Disable Bit */ pch_iobp_update(ADSP_IOBP_PCICFGCTL, ~0, ADSP_PCICFGCTL_PCICD); diff --git a/src/soc/intel/broadwell/pch/serialio.c b/src/soc/intel/broadwell/pch/serialio.c index 5035987faf..1d6773880a 100644 --- a/src/soc/intel/broadwell/pch/serialio.c +++ b/src/soc/intel/broadwell/pch/serialio.c @@ -2,12 +2,10 @@ #include <device/mmio.h> #include <device/pci_ops.h> -#include <acpi/acpi_gnvs.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <soc/device_nvs.h> #include <soc/pci_devs.h> #include <soc/pch.h> #include <soc/ramstage.h> @@ -159,7 +157,7 @@ static void serialio_init(struct device *dev) { const struct soc_intel_broadwell_pch_config *config = config_of(dev); struct resource *bar0, *bar1; - int sio_index = -1; + enum pch_acpi_device dev_index = NUM_PCH_ACPI_DEVICES; printk(BIOS_DEBUG, "Initializing Serial IO device\n"); @@ -178,54 +176,48 @@ static void serialio_init(struct device *dev) serialio_enable_clock(bar0); switch (dev->path.pci.devfn) { - case PCH_DEVFN_SDMA: /* SDMA */ - sio_index = SIO_ID_SDMA; + case PCH_DEVFN_SDMA: + dev_index = PCH_ACPI_SDMA; serialio_init_once(config->sio_acpi_mode); - serialio_d21_mode(sio_index, SIO_PIN_INTB, + serialio_d21_mode(SIO_ID_SDMA, SIO_PIN_INTB, config->sio_acpi_mode); break; - case PCH_DEVFN_I2C0: /* I2C0 */ - sio_index = SIO_ID_I2C0; + case PCH_DEVFN_I2C0: + dev_index = PCH_ACPI_I2C0; serialio_d21_ltr(bar0); serialio_i2c_voltage_sel(bar0, config->sio_i2c0_voltage); - serialio_d21_mode(sio_index, SIO_PIN_INTC, - config->sio_acpi_mode); + serialio_d21_mode(SIO_ID_I2C0, SIO_PIN_INTC, config->sio_acpi_mode); break; - case PCH_DEVFN_I2C1: /* I2C1 */ - sio_index = SIO_ID_I2C1; + case PCH_DEVFN_I2C1: + dev_index = PCH_ACPI_I2C1; serialio_d21_ltr(bar0); serialio_i2c_voltage_sel(bar0, config->sio_i2c1_voltage); - serialio_d21_mode(sio_index, SIO_PIN_INTC, - config->sio_acpi_mode); + serialio_d21_mode(SIO_ID_I2C1, SIO_PIN_INTC, config->sio_acpi_mode); break; - case PCH_DEVFN_SPI0: /* SPI0 */ - sio_index = SIO_ID_SPI0; + case PCH_DEVFN_SPI0: + dev_index = PCH_ACPI_GSPI0; serialio_d21_ltr(bar0); - serialio_d21_mode(sio_index, SIO_PIN_INTC, - config->sio_acpi_mode); + serialio_d21_mode(SIO_ID_SPI0, SIO_PIN_INTC, config->sio_acpi_mode); break; - case PCH_DEVFN_SPI1: /* SPI1 */ - sio_index = SIO_ID_SPI1; + case PCH_DEVFN_SPI1: + dev_index = PCH_ACPI_GSPI1; serialio_d21_ltr(bar0); - serialio_d21_mode(sio_index, SIO_PIN_INTC, - config->sio_acpi_mode); + serialio_d21_mode(SIO_ID_SPI1, SIO_PIN_INTC, config->sio_acpi_mode); break; - case PCH_DEVFN_UART0: /* UART0 */ - sio_index = SIO_ID_UART0; + case PCH_DEVFN_UART0: + dev_index = PCH_ACPI_UART0; if (!serialio_uart_is_debug(dev)) serialio_d21_ltr(bar0); - serialio_d21_mode(sio_index, SIO_PIN_INTD, - config->sio_acpi_mode); + serialio_d21_mode(SIO_ID_UART0, SIO_PIN_INTD, config->sio_acpi_mode); break; - case PCH_DEVFN_UART1: /* UART1 */ - sio_index = SIO_ID_UART1; + case PCH_DEVFN_UART1: + dev_index = PCH_ACPI_UART1; if (!serialio_uart_is_debug(dev)) serialio_d21_ltr(bar0); - serialio_d21_mode(sio_index, SIO_PIN_INTD, - config->sio_acpi_mode); + serialio_d21_mode(SIO_ID_UART1, SIO_PIN_INTD, config->sio_acpi_mode); break; - case PCH_DEVFN_SDIO: /* SDIO */ - sio_index = SIO_ID_SDIO; + case PCH_DEVFN_SDIO: + dev_index = PCH_ACPI_SDIO; serialio_d23_ltr(bar0); serialio_d23_mode(config->sio_acpi_mode); break; @@ -234,15 +226,14 @@ static void serialio_init(struct device *dev) } if (config->sio_acpi_mode) { - struct device_nvs *dev_nvs = acpi_get_device_nvs(); - - /* Save BAR0 and BAR1 to ACPI NVS */ - dev_nvs->bar0[sio_index] = (u32)bar0->base; - dev_nvs->bar1[sio_index] = (u32)bar1->base; + /* Save BAR0 and BAR1 */ + struct pch_acpi_device_state *state = get_acpi_device_state(dev_index); + state->bar0 = (u32)bar0->base; + state->bar1 = (u32)bar1->base; if (!serialio_uart_is_debug(dev)) { /* Do not enable UART if it is used as debug port */ - dev_nvs->enable[sio_index] = 1; + state->enable = 1; /* Put device in D3hot state via BAR1 */ if (dev->path.pci.devfn != PCH_DEVFN_SDMA) |