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-rw-r--r--src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb8
-rw-r--r--src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb8
-rw-r--r--src/mainboard/google/zork/variants/baseboard/include/baseboard/ec.h1
-rw-r--r--src/mainboard/google/zork/variants/morphius/include/variant/ec.h1
4 files changed, 4 insertions, 14 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
index 69146041e8..68eb6ea588 100644
--- a/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
+++ b/src/mainboard/google/zork/variants/baseboard/devicetree_dalboz.cb
@@ -227,13 +227,7 @@ chip soc/amd/picasso
.oob_ch_en = 0,
.flash_ch_en = 0,
- /*
- * b/160595155 - These should really be ESPI_VW_IRQ_LEVEL_HIGH,
- * but eSPI gets configured in verstage which is in RO.
- * We have already locked RO for zork devices so we need
- * make it so x86 coreboot re-initializes the vw_irq_polarity.
- */
- .vw_irq_polarity = ESPI_VW_IRQ_LEVEL_LOW(1) | ESPI_VW_IRQ_LEVEL_LOW(12),
+ .vw_irq_polarity = ESPI_VW_IRQ_LEVEL_HIGH(1) | ESPI_VW_IRQ_LEVEL_HIGH(12),
}"
register "i2c_scl_reset" = "GPIO_I2C2_SCL | GPIO_I2C3_SCL"
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
index 96e66aff1c..4bb42dea1c 100644
--- a/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
+++ b/src/mainboard/google/zork/variants/baseboard/devicetree_trembyle.cb
@@ -225,13 +225,7 @@ chip soc/amd/picasso
.oob_ch_en = 0,
.flash_ch_en = 0,
- /*
- * b/160595155 - These should really be ESPI_VW_IRQ_LEVEL_HIGH,
- * but eSPI gets configured in verstage which is in RO.
- * We have already locked RO for zork devices so we need
- * make it so x86 coreboot re-initializes the vw_irq_polarity.
- */
- .vw_irq_polarity = ESPI_VW_IRQ_LEVEL_LOW(1) | ESPI_VW_IRQ_LEVEL_LOW(12),
+ .vw_irq_polarity = ESPI_VW_IRQ_LEVEL_HIGH(1) | ESPI_VW_IRQ_LEVEL_HIGH(12),
}"
register "i2c_scl_reset" = "GPIO_I2C2_SCL | GPIO_I2C3_SCL"
diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/ec.h b/src/mainboard/google/zork/variants/baseboard/include/baseboard/ec.h
index 46177fccfb..d2ec79bef9 100644
--- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/ec.h
+++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/ec.h
@@ -63,6 +63,7 @@
#define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */
#define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */
#define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */
+#define SIO_EC_PS2K_IRQ Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {1}
/*
* Enable EC sync interrupt via GPIO controller, EC_SYNC_IRQ is defined in
diff --git a/src/mainboard/google/zork/variants/morphius/include/variant/ec.h b/src/mainboard/google/zork/variants/morphius/include/variant/ec.h
index 3564d542cd..fbcdf4e0f8 100644
--- a/src/mainboard/google/zork/variants/morphius/include/variant/ec.h
+++ b/src/mainboard/google/zork/variants/morphius/include/variant/ec.h
@@ -4,6 +4,7 @@
/* Enable PS/2 Mouse */
#define SIO_EC_ENABLE_PS2M
+#define SIO_EC_PS2M_IRQ Interrupt (ResourceConsumer, Level, ActiveLow, Shared) {12}
/* Enable DPTC support */
#define EC_ENABLE_AMD_DPTC_SUPPORT