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-rw-r--r--src/soc/intel/apollolake/chip.c3
-rw-r--r--src/soc/intel/apollolake/chip.h3
2 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 60067735ce..af145c0259 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -534,6 +534,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
memcpy(silconfig->PcieRpClkReqNumber, cfg->pcie_rp_clkreq_pin,
sizeof(silconfig->PcieRpClkReqNumber));
+ memcpy(silconfig->PcieRpHotPlug, cfg->pcie_rp_hotplug_enable,
+ sizeof(silconfig->PcieRpHotPlug));
+
if (cfg->emmc_tx_cmd_cntl != 0)
silconfig->EmmcTxCmdCntl = cfg->emmc_tx_cmd_cntl;
if (cfg->emmc_tx_data_cntl1 != 0)
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index 7a1d16a1ad..fe845ab06c 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -46,6 +46,9 @@ struct soc_intel_apollolake_config {
*/
uint8_t pcie_rp_clkreq_pin[MAX_PCIE_PORTS];
+ /* Enable/disable hot-plug for root ports (0 = disable, 1 = enable). */
+ uint8_t pcie_rp_hotplug_enable[MAX_PCIE_PORTS];
+
/* [14:8] DDR mode Number of dealy elements.Each = 125pSec.
* [6:0] SDR mode Number of dealy elements.Each = 125pSec.
*/