diff options
| -rw-r--r-- | src/soc/intel/elkhartlake/Kconfig | 2 | ||||
| -rw-r--r-- | src/soc/intel/elkhartlake/finalize.c | 11 |
2 files changed, 11 insertions, 2 deletions
diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig index 467662946d..74e003d5af 100644 --- a/src/soc/intel/elkhartlake/Kconfig +++ b/src/soc/intel/elkhartlake/Kconfig @@ -65,8 +65,6 @@ config CPU_SPECIFIC_OPTIONS select UDELAY_TSC select UDK_202005_BINDING select USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM - select USE_FSP_NOTIFY_PHASE_READY_TO_BOOT - select USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE config MAX_CPUS int diff --git a/src/soc/intel/elkhartlake/finalize.c b/src/soc/intel/elkhartlake/finalize.c index 493a3ad7c8..d6ab737de4 100644 --- a/src/soc/intel/elkhartlake/finalize.c +++ b/src/soc/intel/elkhartlake/finalize.c @@ -6,6 +6,7 @@ #include <cpu/x86/smm.h> #include <device/mmio.h> #include <device/pci.h> +#include <intelblocks/cse.h> #include <intelblocks/lpc_lib.h> #include <intelblocks/pcr.h> #include <intelblocks/pmclib.h> @@ -30,12 +31,22 @@ static void pch_finalize(void) pmc_clear_pmcon_sts(); } +static void heci_finalize(void) +{ + heci_set_to_d0i3(); + if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT)) + heci1_disable(); +} + static void soc_finalize(void *unused) { printk(BIOS_DEBUG, "Finalizing chipset.\n"); pch_finalize(); apm_control(APM_CNT_FINALIZE); + if (CONFIG(USE_FSP_NOTIFY_PHASE_READY_TO_BOOT) && + CONFIG(USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE)) + heci_finalize(); /* Indicate finalize step with post code */ post_code(POST_OS_BOOT); |