diff options
6 files changed, 76 insertions, 30 deletions
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index b48124b165..1d29b6fb82 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -15,7 +15,6 @@ config BOARD_GOOGLE_BRYA_COMMON select DRIVERS_INTEL_PMC select DRIVERS_INTEL_SOUNDWIRE select DRIVERS_INTEL_USB4_RETIMER - select DRIVERS_PCIE_GENERIC select DRIVERS_SOUNDWIRE_ALC5682 select DRIVERS_SOUNDWIRE_MAX98373 select DRIVERS_SPI_ACPI diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb index c75f321861..f2276d0447 100644 --- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb @@ -147,26 +147,6 @@ chip soc/intel/alderlake device ref i2c3 on end device ref heci1 on end device ref sata on end - device ref pcie_rp6 on - # Enable WWAN PCIE 6 using clk 5 - chip soc/intel/common/block/pcie/rtd3 - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)" - register "reset_off_delay_ms" = "20" - register "srcclk_pin" = "5" - register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL" - register "skip_on_off_support" = "true" - device generic 0 alias rp6_rtd3 on end - end - register "pch_pcie_rp[PCH_RP(6)]" = "{ - .clk_src = 5, - .clk_req = 5, - .flags = PCIE_RP_LTR | PCIE_RP_AER, - }" - chip drivers/pcie/generic - register "is_untrusted" = "1" - device pci 0 on end - end - end #PCIE6 WWAN device ref pcie_rp8 on # Enable SD Card PCIE 8 using clk 3 register "pch_pcie_rp[PCH_RP(8)]" = "{ diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index 63ffe2f4cb..0f1c693529 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -189,7 +189,23 @@ chip soc/intel/alderlake end end device ref pcie_rp6 on - probe DB_LTE LTE_PCIE + # Enable WWAN PCIE 6 using clk 5 + register "pch_pcie_rp[PCH_RP(6)]" = "{ + .clk_src = 5, + .clk_req = 5, + .flags = PCIE_RP_LTR | PCIE_RP_AER, + }" + chip soc/intel/common/block/pcie/rtd3 + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)" + register "reset_off_delay_ms" = "20" + # register "reset_delay_ms" = "1000" + register "srcclk_pin" = "5" + register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL" + register "skip_on_off_support" = "true" + device generic 0 alias rp6_rtd3 on + probe DB_LTE LTE_PCIE + end + end chip drivers/wwan/fm register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F21)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E16)" @@ -197,11 +213,11 @@ chip soc/intel/alderlake register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A7)" register "add_acpi_dma_property" = "true" use rp6_rtd3 as rtd3dev - device generic 0 alias rp6_wwan on + device generic 0 on probe DB_LTE LTE_PCIE end end - + probe DB_LTE LTE_PCIE end device ref tcss_dma0 on chip drivers/intel/usb4/retimer diff --git a/src/mainboard/google/brya/variants/brya4es/overridetree.cb b/src/mainboard/google/brya/variants/brya4es/overridetree.cb index 6a12c704d8..af0f43ebcd 100644 --- a/src/mainboard/google/brya/variants/brya4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya4es/overridetree.cb @@ -188,7 +188,23 @@ chip soc/intel/alderlake end end device ref pcie_rp6 on - probe DB_LTE LTE_PCIE + # Enable WWAN PCIE 6 using clk 5 + register "pch_pcie_rp[PCH_RP(6)]" = "{ + .clk_src = 5, + .clk_req = 5, + .flags = PCIE_RP_LTR | PCIE_RP_AER, + }" + chip soc/intel/common/block/pcie/rtd3 + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)" + register "reset_off_delay_ms" = "20" + # register "reset_delay_ms" = "1000" + register "srcclk_pin" = "5" + register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL" + register "skip_on_off_support" = "true" + device generic 0 alias rp6_rtd3 on + probe DB_LTE LTE_PCIE + end + end chip drivers/wwan/fm register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F21)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E16)" @@ -196,10 +212,11 @@ chip soc/intel/alderlake register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A7)" register "add_acpi_dma_property" = "true" use rp6_rtd3 as rtd3dev - device generic 0 alias rp6_wwan on + device generic 0 on probe DB_LTE LTE_PCIE end end + probe DB_LTE LTE_PCIE end device ref tcss_dma0 on chip drivers/intel/usb4/retimer diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb index a44cb40521..149b4f3a91 100644 --- a/src/mainboard/google/brya/variants/redrix/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb @@ -174,7 +174,23 @@ chip soc/intel/alderlake end end device ref pcie_rp6 on - probe DB_LTE LTE_PCIE + # Enable WWAN PCIE 6 using clk 5 + register "pch_pcie_rp[PCH_RP(6)]" = "{ + .clk_src = 5, + .clk_req = 5, + .flags = PCIE_RP_LTR | PCIE_RP_AER, + }" + chip soc/intel/common/block/pcie/rtd3 + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)" + register "reset_off_delay_ms" = "20" + # register "reset_delay_ms" = "1000" + register "srcclk_pin" = "5" + register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL" + register "skip_on_off_support" = "true" + device generic 0 alias rp6_rtd3 on + probe DB_LTE LTE_PCIE + end + end chip drivers/wwan/fm register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F21)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E16)" @@ -182,10 +198,11 @@ chip soc/intel/alderlake register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A7)" register "add_acpi_dma_property" = "true" use rp6_rtd3 as rtd3dev - device generic 0 alias rp6_wwan on + device generic 0 on probe DB_LTE LTE_PCIE end end + probe DB_LTE LTE_PCIE end device ref tcss_dma0 on chip drivers/intel/usb4/retimer diff --git a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb index 9c51512c57..9a0eb1f6e8 100644 --- a/src/mainboard/google/brya/variants/redrix4es/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix4es/overridetree.cb @@ -160,7 +160,23 @@ chip soc/intel/alderlake end end device ref pcie_rp6 on - probe DB_LTE LTE_PCIE + # Enable WWAN PCIE 6 using clk 5 + register "pch_pcie_rp[PCH_RP(6)]" = "{ + .clk_src = 5, + .clk_req = 5, + .flags = PCIE_RP_LTR | PCIE_RP_AER, + }" + chip soc/intel/common/block/pcie/rtd3 + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)" + register "reset_off_delay_ms" = "20" + # register "reset_delay_ms" = "1000" + register "srcclk_pin" = "5" + register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL" + register "skip_on_off_support" = "true" + device generic 0 alias rp6_rtd3 on + probe DB_LTE LTE_PCIE + end + end chip drivers/wwan/fm register "fcpo_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_F21)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E16)" @@ -168,10 +184,11 @@ chip soc/intel/alderlake register "wake_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_A7)" register "add_acpi_dma_property" = "true" use rp6_rtd3 as rtd3dev - device generic 0 alias rp6_wwan on + device generic 0 on probe DB_LTE LTE_PCIE end end + probe DB_LTE LTE_PCIE end device ref tcss_dma0 on chip drivers/intel/usb4/retimer |