summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/device/dram/ddr4.c20
-rw-r--r--src/device/dram/spd.c15
-rw-r--r--src/include/spd.h14
-rw-r--r--tests/lib/dimm_info_util-test.c9
4 files changed, 15 insertions, 43 deletions
diff --git a/src/device/dram/ddr4.c b/src/device/dram/ddr4.c
index 14b5dd3f1a..6ccef7274f 100644
--- a/src/device/dram/ddr4.c
+++ b/src/device/dram/ddr4.c
@@ -272,25 +272,7 @@ enum cb_err spd_add_smbios17_ddr4(const u8 channel, const u8 slot, const u16 sel
dimm->dimm_num = slot;
memcpy(dimm->module_part_number, info->part_number, SPD_DDR4_PART_LEN);
dimm->mod_id = info->manufacturer_id;
-
- switch (info->dimm_type) {
- case SPD_DDR4_DIMM_TYPE_SO_DIMM:
- dimm->mod_type = DDR4_SPD_SODIMM;
- break;
- case SPD_DDR4_DIMM_TYPE_72B_SO_RDIMM:
- dimm->mod_type = DDR4_SPD_72B_SO_RDIMM;
- break;
- case SPD_DDR4_DIMM_TYPE_UDIMM:
- dimm->mod_type = DDR4_SPD_UDIMM;
- break;
- case SPD_DDR4_DIMM_TYPE_RDIMM:
- dimm->mod_type = DDR4_SPD_RDIMM;
- break;
- default:
- dimm->mod_type = SPD_UNDEFINED;
- break;
- }
-
+ dimm->mod_type = info->dimm_type;
dimm->bus_width = info->bus_width;
memcpy(dimm->serial, info->serial_number,
MIN(sizeof(dimm->serial), sizeof(info->serial_number)));
diff --git a/src/device/dram/spd.c b/src/device/dram/spd.c
index c4ccfee0ba..e33a26ad68 100644
--- a/src/device/dram/spd.c
+++ b/src/device/dram/spd.c
@@ -2,6 +2,7 @@
#include <device/dram/ddr2.h>
#include <device/dram/ddr3.h>
+#include <device/dram/ddr4.h>
#include <device/dram/ddr5.h>
#include <device/dram/spd.h>
#include <spd.h>
@@ -109,22 +110,22 @@ static void convert_ddr3_module_type_to_spd_info(enum spd_dimm_type_ddr3 module_
}
}
-static void convert_ddr4_module_type_to_spd_info(enum ddr4_module_type module_type,
+static void convert_ddr4_module_type_to_spd_info(enum spd_dimm_type_ddr4 module_type,
struct spd_info *info)
{
switch (module_type) {
- case DDR4_SPD_RDIMM:
- case DDR4_SPD_MINI_RDIMM:
+ case SPD_DDR4_DIMM_TYPE_RDIMM:
+ case SPD_DDR4_DIMM_TYPE_MINI_RDIMM:
info->form_factor = MEMORY_FORMFACTOR_DIMM;
info->type_detail = MEMORY_TYPE_DETAIL_REGISTERED;
break;
- case DDR4_SPD_UDIMM:
- case DDR4_SPD_MINI_UDIMM:
+ case SPD_DDR4_DIMM_TYPE_UDIMM:
+ case SPD_DDR4_DIMM_TYPE_MINI_UDIMM:
info->form_factor = MEMORY_FORMFACTOR_DIMM;
info->type_detail = MEMORY_TYPE_DETAIL_UNBUFFERED;
break;
- case DDR4_SPD_SODIMM:
- case DDR4_SPD_72B_SO_UDIMM:
+ case SPD_DDR4_DIMM_TYPE_SO_DIMM:
+ case SPD_DDR4_DIMM_TYPE_72B_SO_RDIMM:
info->form_factor = MEMORY_FORMFACTOR_SODIMM;
info->type_detail = MEMORY_TYPE_DETAIL_UNKNOWN;
break;
diff --git a/src/include/spd.h b/src/include/spd.h
index b456680bc6..ff0cd640e1 100644
--- a/src/include/spd.h
+++ b/src/include/spd.h
@@ -201,20 +201,6 @@ enum spd_memory_type {
#define SPD_ECC_8BIT (1<<3)
#define SPD_ECC_8BIT_LP5_DDR5 (1<<4)
-/* Byte 3 [3:0]: DDR4 Module type information */
-enum ddr4_module_type {
- DDR4_SPD_RDIMM = 0x01,
- DDR4_SPD_UDIMM = 0x02,
- DDR4_SPD_SODIMM = 0x03,
- DDR4_SPD_LRDIMM = 0x04,
- DDR4_SPD_MINI_RDIMM = 0x05,
- DDR4_SPD_MINI_UDIMM = 0x06,
- DDR4_SPD_72B_SO_RDIMM = 0x08,
- DDR4_SPD_72B_SO_UDIMM = 0x09,
- DDR4_SPD_16B_SO_DIMM = 0x0c,
- DDR4_SPD_32B_SO_RDIMM = 0x0d,
-};
-
enum lpx_module_type {
LPX_SPD_LPDIMM = 0x07,
LPX_SPD_NONDIMM = 0x0e,
diff --git a/tests/lib/dimm_info_util-test.c b/tests/lib/dimm_info_util-test.c
index 3d11416c8a..624924f9c7 100644
--- a/tests/lib/dimm_info_util-test.c
+++ b/tests/lib/dimm_info_util-test.c
@@ -2,6 +2,7 @@
#include <device/dram/ddr2.h>
#include <device/dram/ddr3.h>
+#include <device/dram/ddr4.h>
#include <device/dram/ddr5.h>
#include <dimm_info_util.h>
#include <spd.h>
@@ -157,9 +158,11 @@ static void test_smbios_form_factor_to_spd_mod_type(void **state)
},
{
.memory_type = MEMORY_TYPE_DDR4,
- .udimm_allowed = {DDR4_SPD_UDIMM, DDR4_SPD_MINI_UDIMM},
- .rdimm_allowed = {DDR4_SPD_RDIMM, DDR4_SPD_MINI_RDIMM},
- .expected_module_type = DDR4_SPD_SODIMM,
+ .udimm_allowed = {SPD_DDR4_DIMM_TYPE_UDIMM,
+ SPD_DDR4_DIMM_TYPE_MINI_UDIMM},
+ .rdimm_allowed = {SPD_DDR4_DIMM_TYPE_RDIMM,
+ SPD_DDR4_DIMM_TYPE_MINI_RDIMM},
+ .expected_module_type = SPD_DDR4_DIMM_TYPE_SO_DIMM,
},
{.memory_type = MEMORY_TYPE_DDR5,
.udimm_allowed = {DDR5_SPD_UDIMM, DDR5_SPD_MINI_UDIMM},