diff options
| -rw-r--r-- | src/soc/amd/stoneyridge/Kconfig | 32 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/Makefile.inc | 18 |
2 files changed, 44 insertions, 6 deletions
diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 78b89e3025..3a8fd05200 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -23,7 +23,20 @@ config SOC_AMD_STONEYRIDGE_FT4 help AMD Stoney Ridge FT4 support -if SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 +config SOC_AMD_MERLINFALCON + bool + help + AMD Merlin Falcon FP4 support + +config HAVE_MERLINFALCON_BINARIES + depends on SOC_AMD_MERLINFALCON + bool "Merlinfalcon binaries are present" + default n + help + This config option will be removed once the binaries are merged + to the blobs repo. See 33615. + +if SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 || SOC_AMD_MERLINFALCON config CPU_SPECIFIC_OPTIONS def_bool y @@ -68,7 +81,6 @@ config CPU_SPECIFIC_OPTIONS select POSTCAR_CONSOLE select SSE2 select RTC - select SOC_AMD_PSP_SELECTABLE_SMU_FW config VBOOT select VBOOT_SEPARATE_VERSTAGE @@ -133,6 +145,7 @@ config MMCONF_BUS_NUMBER config VGA_BIOS_ID string + default "1002,9874" if SOC_AMD_MERLINFALCON default "1002,98e4" help The default VGA BIOS PCI vendor/device ID should be set to the @@ -140,6 +153,7 @@ config VGA_BIOS_ID config VGA_BIOS_FILE string + default "3rdparty/blobs/soc/amd/merlinfalcon/VBIOS.bin" if SOC_AMD_MERLINFALCON && HAVE_MERLINFALCON_BINARIES default "3rdparty/blobs/soc/amd/stoneyridge/VBIOS.bin" config S3_VGA_ROM_RUN @@ -188,6 +202,7 @@ config STONEYRIDGE_GEC_FWM_FILE config AMD_PUBKEY_FILE string "AMD public Key" + default "3rdparty/blobs/soc/amd/merlinfalcon/PSP/AmdPubKeyCZ.bin" if SOC_AMD_MERLINFALCON && HAVE_MERLINFALCON_BINARIES default "3rdparty/blobs/soc/amd/stoneyridge/PSP/AmdPubKeyST.bin" config STONEYRIDGE_SATA_MODE @@ -306,6 +321,17 @@ config USE_PSPSECUREOS If unsure, answer 'y' +config SOC_AMD_PSP_SELECTABLE_SMU_FW + bool + default n if SOC_AMD_MERLINFALCON + default y + help + Some ST implementations allow storing SMU firmware into cbfs and + calling the PSP to load the blobs at the proper time. + + Merlin Falcon does not support it. If you are using 00670F00 SOC, + ask your AMD representative if it supports it or not. + config SOC_AMD_SMU_FANLESS bool depends on SOC_AMD_PSP_SELECTABLE_SMU_FW @@ -384,4 +410,4 @@ config MAINBOARD_POWER_RESTORE return to S0. Otherwise the system will remain in S5 once power is restored. -endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 +endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 || SOC_AMD_MERLINFALCON diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index babd878524..150df3abd9 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -27,7 +27,7 @@ # SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # #***************************************************************************** -ifeq ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y) +ifeq ($(CONFIG_SOC_AMD_MERLINFALCON)$(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y) subdirs-y += ../../../cpu/amd/mtrr/ subdirs-y += ../../../cpu/x86/tsc @@ -142,7 +142,11 @@ STONEYRIDGE_FWM_POSITION=$(call int-add, \ ### 0 FIRMWARE_LOCATE=$(dir $(call strip_quotes, $(CONFIG_AMD_PUBKEY_FILE))) +ifeq ($(CONFIG_HAVE_MERLINFALCON_BINARIES),y) +FIRMWARE_TYPE=CZ +else FIRMWARE_TYPE=ST +endif ###5 PUBSIGNEDKEY_FILE=$(top)/$(FIRMWARE_LOCATE)/RtmPubSigned$(FIRMWARE_TYPE).key @@ -191,6 +195,11 @@ SMUFIRMWARE2_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE).s SMUFIRMWARE2_FN_FILE=$(top)/$(FIRMWARE_LOCATE)/SmuFirmware2_prod_$(FIRMWARE_TYPE)_FN.sbin endif +ifeq ("$(wildcard $(SMUFWM_FN_FILE))","") +SMUFWM_FN_FILE= +SMUFIRMWARE2_FN_FILE= +endif + add_opt_prefix=$(if $(call strip_quotes, $(1)), $(2) $(call strip_quotes, $(1)), ) OPT_STONEYRIDGE_XHCI_FWM_FILE=$(call add_opt_prefix, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE), --xhci) @@ -214,6 +223,9 @@ SUBPROG_FN_SMU_FW=1 OPT_SMUFWM_FN_FILE=$(call add_opt_prefix, $(SMUFWM_FN_FILE), --subprogram $(SUBPROG_FN_SMU_FW) --smufirmware) OPT_SMUFIRMWARE2_FN_FILE=$(call add_opt_prefix, $(SMUFIRMWARE2_FN_FILE), --subprogram $(SUBPROG_FN_SMU_FW) --smufirmware2) +ifeq ($(FIRMWARE_TYPE),ST) +OPT_COMBOCAPABLE=--combo-capable +endif $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE)) \ $(call strip_quotes, $(CONFIG_STONEYRIDGE_GEC_FWM_FILE)) \ @@ -263,7 +275,7 @@ $(obj)/amdfw.rom: $(call strip_quotes, $(CONFIG_STONEYRIDGE_XHCI_FWM_FILE)) \ $(OPT_SMUFIRMWARE2_FILE) \ $(OPT_SMUFIRMWARE2_FN_FILE) \ $(OPT_SMUSCS_FILE) \ - --combo-capable \ + $(OPT_COMBOCAPABLE)\ --flashsize $(CONFIG_ROM_SIZE) \ --location $(shell printf "0x%x" $(STONEYRIDGE_FWM_POSITION)) \ --output $@ @@ -313,4 +325,4 @@ endif endif # ifeq ($(CONFIG_SOC_AMD_PSP_SELECTABLE_SMU_FW),y) -endif # ($(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y) +endif # ($(CONFIG_SOC_AMD_MERLINFALCON)$(CONFIG_SOC_AMD_STONEYRIDGE_FP4)$(CONFIG_SOC_AMD_STONEYRIDGE_FT4),y) |