diff options
| -rw-r--r-- | src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h | 17 | ||||
| -rw-r--r-- | src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h | 20 |
2 files changed, 22 insertions, 15 deletions
diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h index 65c8c024e3..76c8fd6394 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspmUpd.h @@ -454,9 +454,10 @@ typedef struct { UINT8 ApertureSize; /** Offset 0x01D0 - Board Type - MrcBoardType, Options are 0=Mobile/Mobile Halo, 1=Desktop/DT Halo, 5=ULT/ULX/Mobile - Halo, 7=UP Server - 0:Mobile/Mobile Halo, 1:Desktop/DT Halo, 5:ULT/ULX/Mobile Halo, 7:UP Server + MrcBoardType, Options are 0=Mobile/Mobile Halo, 1=Desktop/DT Halo, 2=Desktop 2DPC + DDR5, 5=ULT/ULX/Mobile Halo, 7=UP Server + 0:Mobile/Mobile Halo, 1:Desktop/DT Halo, 2:Desktop 2DPC DDR5, 5:ULT/ULX/Mobile Halo, + 7:UP Server **/ UINT8 UserBd; @@ -2939,12 +2940,12 @@ typedef struct { UINT8 Reserved38[3]; /** Offset 0x08DE - REFRESH_PANIC_WM - Refresh Panic Watermark, range 1-8, Default is 8 + DEPRECATED **/ UINT8 RefreshPanicWm; /** Offset 0x08DF - REFRESH_HP_WM - Refresh High Priority Watermark, range 1-7, Default is 7 + DEPRECATED **/ UINT8 RefreshHpWm; @@ -3161,7 +3162,7 @@ typedef struct { /** Offset 0x0AA8 - Reserved **/ - UINT8 Reserved46[56]; + UINT8 Reserved46[64]; } FSP_M_CONFIG; /** Fsp M UPD Configuration @@ -3180,11 +3181,11 @@ typedef struct { **/ FSP_M_CONFIG FspmConfig; -/** Offset 0x0AE0 +/** Offset 0x0AE8 **/ UINT8 UnusedUpdSpace29[6]; -/** Offset 0x0AE6 +/** Offset 0x0AEE **/ UINT16 UpdTerminator; } FSPM_UPD; diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h index 7fd878920a..d689bd8c3b 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h +++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h @@ -1547,9 +1547,15 @@ typedef struct { **/ UINT16 VrVoltageLimit[5]; -/** Offset 0x069E - Reserved +/** Offset 0x069E - VccIn Aux Imon IccMax + PCODE MMIO Mailbox: VccIn Aux Imon IccMax. <b>0 - Auto</b> Values are in 1/4 Amp + increments. Range is 0-512. **/ - UINT8 Reserved27[12]; + UINT16 VccInAuxImonIccImax; + +/** Offset 0x06A0 - Reserved +**/ + UINT8 Reserved27[10]; /** Offset 0x06AA - FIVR RFI Spread Spectrum Enable or disable Enable or Disable FIVR RFI Spread Spectrum. 0: Disable ; <b> 1: Enable </b> @@ -1960,8 +1966,8 @@ typedef struct { UINT8 PcieComplianceTestMode; /** Offset 0x09CA - PCIE Rp Function Swap - Allows BIOS to use root port function number swapping when root port of function - 0 is disabled. + DEPRECATED. Allows BIOS to use root port function number swapping when root port + of function 0 is disabled. $EN_DIS **/ UINT8 PcieRpFunctionSwap; @@ -3861,7 +3867,7 @@ typedef struct { /** Offset 0x0FD5 - Reserved **/ - UINT8 Reserved57[3]; + UINT8 Reserved57[11]; } FSP_S_CONFIG; /** Fsp S UPD Configuration @@ -3880,11 +3886,11 @@ typedef struct { **/ FSP_S_CONFIG FspsConfig; -/** Offset 0x0FD8 +/** Offset 0x0FE0 **/ UINT8 UnusedUpdSpace40[6]; -/** Offset 0x0FDE +/** Offset 0x0FE6 **/ UINT16 UpdTerminator; } FSPS_UPD; |