diff options
-rw-r--r-- | src/soc/intel/meteorlake/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/meteorlake/chip.c | 3 | ||||
-rw-r--r-- | src/soc/intel/meteorlake/include/soc/pmc.h | 1 | ||||
-rw-r--r-- | src/soc/intel/meteorlake/ioe_pmc.c | 24 | ||||
-rw-r--r-- | src/soc/intel/meteorlake/pmc.c | 4 |
5 files changed, 30 insertions, 3 deletions
diff --git a/src/soc/intel/meteorlake/Makefile.inc b/src/soc/intel/meteorlake/Makefile.inc index aa82381fcd..39a1d652f0 100644 --- a/src/soc/intel/meteorlake/Makefile.inc +++ b/src/soc/intel/meteorlake/Makefile.inc @@ -32,6 +32,7 @@ ramstage-y += acpi.c ramstage-y += chip.c ramstage-y += cpu.c ramstage-$(CONFIG_SOC_INTEL_CRASHLOG) += crashlog.c +ramstage-y += ioe_pmc.c ramstage-y += elog.c ramstage-y += espi.c ramstage-y += finalize.c diff --git a/src/soc/intel/meteorlake/chip.c b/src/soc/intel/meteorlake/chip.c index 819278b199..79a2452db2 100644 --- a/src/soc/intel/meteorlake/chip.c +++ b/src/soc/intel/meteorlake/chip.c @@ -232,6 +232,9 @@ static void soc_enable(struct device *dev) dev->path.pci.devfn == PCI_DEVFN_PMC) dev->ops = &pmc_ops; else if (dev->path.type == DEVICE_PATH_PCI && + dev->path.pci.devfn == PCI_DEVFN_IOE_PMC) + dev->ops = &ioe_pmc_ops; + else if (dev->path.type == DEVICE_PATH_PCI && dev->path.pci.devfn == PCI_DEVFN_P2SB) dev->ops = &soc_p2sb_ops; else if (dev->path.type == DEVICE_PATH_PCI && diff --git a/src/soc/intel/meteorlake/include/soc/pmc.h b/src/soc/intel/meteorlake/include/soc/pmc.h index e7da64236b..9a7aabfb1a 100644 --- a/src/soc/intel/meteorlake/include/soc/pmc.h +++ b/src/soc/intel/meteorlake/include/soc/pmc.h @@ -5,6 +5,7 @@ #include <device/device.h> extern struct device_operations pmc_ops; +extern struct device_operations ioe_pmc_ops; /* PCI Configuration Space (D31:F2): PMC */ #define PWRMBASE 0x10 diff --git a/src/soc/intel/meteorlake/ioe_pmc.c b/src/soc/intel/meteorlake/ioe_pmc.c new file mode 100644 index 0000000000..418c4a5535 --- /dev/null +++ b/src/soc/intel/meteorlake/ioe_pmc.c @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/mmio.h> +#include <intelblocks/pmc.h> +#include <soc/iomap.h> +#include <soc/pm.h> + +static void ioe_pmc_read_resources(struct device *dev) +{ + /* Add the fixed MMIO resource */ + mmio_range(dev, PWRMBASE, IOE_PWRM_BASE_ADDRESS, IOE_PWRM_BASE_SIZE); +} + +static void ioe_pmc_init(struct device *dev) +{ + if (!CONFIG(USE_PM_ACPI_TIMER)) + setbits8(ioe_pmc_mmio_regs() + PCH_PWRM_ACPI_TMR_CTL, ACPI_TIM_DIS); +} + +struct device_operations ioe_pmc_ops = { + .read_resources = ioe_pmc_read_resources, + .set_resources = noop_set_resources, + .init = ioe_pmc_init, +}; diff --git a/src/soc/intel/meteorlake/pmc.c b/src/soc/intel/meteorlake/pmc.c index 454ba9c15c..5c4fa2c115 100644 --- a/src/soc/intel/meteorlake/pmc.c +++ b/src/soc/intel/meteorlake/pmc.c @@ -156,10 +156,8 @@ static void soc_pmc_init(struct device *dev) * Disabling ACPI PM timer is necessary for XTAL OSC shutdown. * Disabling ACPI PM timer also switches off TCO */ - if (!CONFIG(USE_PM_ACPI_TIMER)) { + if (!CONFIG(USE_PM_ACPI_TIMER)) setbits8(pmc_mmio_regs() + PCH_PWRM_ACPI_TMR_CTL, ACPI_TIM_DIS); - setbits8(ioe_pmc_mmio_regs() + PCH_PWRM_ACPI_TMR_CTL, ACPI_TIM_DIS); - } } static void pm1_enable_pwrbtn_smi(void *unused) |