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-rw-r--r--src/soc/intel/cannonlake/bootblock/bootblock.c4
-rw-r--r--src/soc/intel/cannonlake/romstage/pch.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/cannonlake/bootblock/bootblock.c b/src/soc/intel/cannonlake/bootblock/bootblock.c
index de32fcda3d..a72b66e75f 100644
--- a/src/soc/intel/cannonlake/bootblock/bootblock.c
+++ b/src/soc/intel/cannonlake/bootblock/bootblock.c
@@ -3,6 +3,7 @@
#include <bootblock_common.h>
#include <cpu/x86/mtrr.h>
#include <intelblocks/gspi.h>
+#include <intelblocks/tco.h>
#include <intelblocks/uart.h>
#include <soc/bootblock.h>
#include <soc/iomap.h>
@@ -65,4 +66,7 @@ void bootblock_soc_init(void)
gpi_clear_int_cfg();
report_platform_info();
bootblock_pch_init();
+
+ /* Program TCO_BASE_ADDRESS and TCO Timer Halt */
+ tco_configure();
}
diff --git a/src/soc/intel/cannonlake/romstage/pch.c b/src/soc/intel/cannonlake/romstage/pch.c
index c85bdd667f..f94d611abe 100644
--- a/src/soc/intel/cannonlake/romstage/pch.c
+++ b/src/soc/intel/cannonlake/romstage/pch.c
@@ -1,14 +1,10 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <intelblocks/smbus.h>
-#include <intelblocks/tco.h>
#include <soc/romstage.h>
void romstage_pch_init(void)
{
- /* Program TCO_BASE_ADDRESS and TCO Timer Halt */
- tco_configure();
-
/* Program SMBUS_BASE_ADDRESS and enable it */
smbus_common_init();
}