diff options
-rw-r--r-- | src/soc/intel/skylake/Makefile.inc | 1 | ||||
-rw-r--r-- | src/soc/intel/skylake/dsp.c | 33 | ||||
-rw-r--r-- | src/soc/intel/skylake/include/soc/pci_devs.h | 4 |
3 files changed, 38 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/Makefile.inc b/src/soc/intel/skylake/Makefile.inc index f835282977..e22214f343 100644 --- a/src/soc/intel/skylake/Makefile.inc +++ b/src/soc/intel/skylake/Makefile.inc @@ -34,6 +34,7 @@ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c ramstage-y += chip.c ramstage-y += cpu.c ramstage-y += cpu_info.c +ramstage-y += dsp.c ramstage-y += elog.c ramstage-y += finalize.c ramstage-y += flash_controller.c diff --git a/src/soc/intel/skylake/dsp.c b/src/soc/intel/skylake/dsp.c new file mode 100644 index 0000000000..13051a0558 --- /dev/null +++ b/src/soc/intel/skylake/dsp.c @@ -0,0 +1,33 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <device/device.h> +#include <device/pci.h> +#include <device/pci_ids.h> +#include <soc/ramstage.h> + +static struct device_operations dsp_dev_ops = { + .read_resources = &pci_dev_read_resources, + .set_resources = &pci_dev_set_resources, + .enable_resources = &pci_dev_enable_resources, + .scan_bus = &scan_static_bus, + .ops_pci = &soc_pci_ops, +}; + +static const struct pci_driver skylake_dsp __pci_driver = { + .ops = &dsp_dev_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .device = 0x9d70 +}; diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h index 2dba3dec20..53dddcbda8 100644 --- a/src/soc/intel/skylake/include/soc/pci_devs.h +++ b/src/soc/intel/skylake/include/soc/pci_devs.h @@ -43,6 +43,10 @@ #define SA_DEVFN_IGD _SA_DEVFN(IGD) #define SA_DEV_IGD _SA_DEV(IGD) +#define SA_DEV_SLOT_DSP 0x04 +#define SA_DEVFN_DSP _SA_DEVFN(DSP) +#define SA_DEV_DSP _SA_DEV(DSP) + /* PCH Devices */ #define PCH_DEV_SLOT_ISH 0x13 #define PCH_DEVFN_ISH _PCH_DEVFN(ISH, 0) |