diff options
| -rw-r--r-- | src/soc/imgtec/pistachio/include/soc/memlayout.ld | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/imgtec/pistachio/include/soc/memlayout.ld b/src/soc/imgtec/pistachio/include/soc/memlayout.ld index b36d47e9b6..326a26bb79 100644 --- a/src/soc/imgtec/pistachio/include/soc/memlayout.ld +++ b/src/soc/imgtec/pistachio/include/soc/memlayout.ld @@ -38,8 +38,8 @@ SECTIONS * and then through the identity mapping in ROM stage. */ SRAM_START(0x1a000000) - ROMSTAGE(0x1a005000, 40K) - PRERAM_CBFS_CACHE(0x1a00f000, 68K) + ROMSTAGE(0x1a005000, 36K) + PRERAM_CBFS_CACHE(0x1a00e000, 72K) SRAM_END(0x1a020000) /* Bootblock executes out of KSEG0 and sets up the identity mapping. |