diff options
-rw-r--r-- | src/mainboard/intel/jasperlake_rvp/Makefile.inc | 2 | ||||
-rw-r--r-- | src/mainboard/intel/jasperlake_rvp/smihandler.c | 38 |
2 files changed, 40 insertions, 0 deletions
diff --git a/src/mainboard/intel/jasperlake_rvp/Makefile.inc b/src/mainboard/intel/jasperlake_rvp/Makefile.inc index 28684e2fa7..a8c261b5c8 100644 --- a/src/mainboard/intel/jasperlake_rvp/Makefile.inc +++ b/src/mainboard/intel/jasperlake_rvp/Makefile.inc @@ -19,6 +19,8 @@ ramstage-$(CONFIG_CHROMEOS) += chromeos.c ramstage-y += mainboard.c ramstage-y += board_id.c +smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c + subdirs-y += ../common subdirs-y += variants/baseboard CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include diff --git a/src/mainboard/intel/jasperlake_rvp/smihandler.c b/src/mainboard/intel/jasperlake_rvp/smihandler.c new file mode 100644 index 0000000000..c06da29ae2 --- /dev/null +++ b/src/mainboard/intel/jasperlake_rvp/smihandler.c @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* This file is part of the coreboot project. */ + +#include <baseboard/variants.h> +#include <cpu/x86/smm.h> +#include <ec/google/chromeec/ec.h> +#include <ec/google/chromeec/smm.h> +#include <elog.h> +#include <intelblocks/smihandler.h> +#include <baseboard/ec.h> + +void mainboard_smi_espi_handler(void) +{ + if (CONFIG(EC_GOOGLE_CHROMEEC)) + chromeec_smi_process_events(); +} + +void mainboard_smi_sleep(u8 slp_typ) +{ + if (CONFIG(EC_GOOGLE_CHROMEEC)) + chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS, + MAINBOARD_EC_S5_WAKE_EVENTS); +} + +int mainboard_smi_apmc(u8 apmc) +{ + if (CONFIG(EC_GOOGLE_CHROMEEC)) + chromeec_smi_apmc(apmc, MAINBOARD_EC_SCI_EVENTS, MAINBOARD_EC_SMI_EVENTS); + + return 0; +} + +void elog_gsmi_cb_mainboard_log_wake_source(void) +{ + if (CONFIG(EC_GOOGLE_CHROMEEC)) + google_chromeec_log_events(MAINBOARD_EC_LOG_EVENTS | + MAINBOARD_EC_S3_WAKE_EVENTS); +} |