diff options
| -rw-r--r-- | src/soc/intel/skylake/acpi.c | 24 | ||||
| -rw-r--r-- | src/soc/intel/skylake/chip_fsp20.c | 6 | ||||
| -rw-r--r-- | src/soc/intel/skylake/include/soc/systemagent.h | 10 | ||||
| -rw-r--r-- | src/soc/intel/skylake/romstage/romstage_fsp20.c | 7 |
4 files changed, 23 insertions, 24 deletions
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index ccfc7b79df..c3757b0bd3 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -30,7 +30,6 @@ #include <ec/google/chromeec/ec.h> #include <intelblocks/cpulib.h> #include <intelblocks/lpc_lib.h> -#include <intelblocks/p2sb.h> #include <intelblocks/sgx.h> #include <intelblocks/uart.h> #include <intelblocks/systemagent.h> @@ -39,7 +38,6 @@ #include <soc/cpu.h> #include <soc/iomap.h> #include <soc/msr.h> -#include <soc/p2sb.h> #include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/ramstage.h> @@ -575,30 +573,20 @@ static unsigned long acpi_fill_dmar(unsigned long current) acpi_dmar_rmrr_fixup(tmp, current); } - struct device *const p2sb_dev = pcidev_path_on_root(PCH_DEVFN_P2SB); const u32 vtvc0bar = MCHBAR32(VTVC0BAR) & ~0xfff; const bool vtvc0en = MCHBAR32(VTVC0BAR) & 1; /* General VTBAR has to be set and in 32-bit space. */ - if (p2sb_dev && vtvc0bar && vtvc0en && !MCHBAR32(VTVC0BAR + 4)) { + if (vtvc0bar && vtvc0en && !MCHBAR32(VTVC0BAR + 4)) { const unsigned long tmp = current; - /* P2SB may already be hidden. There's no clear rule, when. */ - const u8 p2sb_hidden = - pci_read_config8(p2sb_dev, PCH_P2SB_E0 + 1); - pci_write_config8(p2sb_dev, PCH_P2SB_E0 + 1, 0); + current += acpi_create_dmar_drhd(current, DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar); - const u16 ibdf = pci_read_config16(p2sb_dev, PCH_P2SB_IBDF); - const u16 hbdf = pci_read_config16(p2sb_dev, PCH_P2SB_HBDF); + current += acpi_create_dmar_ds_ioapic(current, 2, V_P2SB_IBDF_BUS, + V_P2SB_IBDF_DEV, V_P2SB_IBDF_FUN); - pci_write_config8(p2sb_dev, PCH_P2SB_E0 + 1, p2sb_hidden); - - current += acpi_create_dmar_drhd(current, - DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar); - current += acpi_create_dmar_ds_ioapic(current, - 2, ibdf >> 8, PCI_SLOT(ibdf), PCI_FUNC(ibdf)); - current += acpi_create_dmar_ds_msi_hpet(current, - 0, hbdf >> 8, PCI_SLOT(hbdf), PCI_FUNC(hbdf)); + current += acpi_create_dmar_ds_msi_hpet(current, 0, V_P2SB_HBDF_BUS, + V_P2SB_HBDF_DEV, V_P2SB_HBDF_FUN); acpi_dmar_drhd_fixup(tmp, current); } diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index e9c37d67c9..de869369a5 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -490,9 +490,9 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) tconfig->VtdDisable = 0; params->PchIoApicBdfValid = 1; - params->PchIoApicBusNumber = 250; - params->PchIoApicDeviceNumber = 31; - params->PchIoApicFunctionNumber = 0; + params->PchIoApicBusNumber = V_P2SB_IBDF_BUS; + params->PchIoApicDeviceNumber = V_P2SB_IBDF_DEV; + params->PchIoApicFunctionNumber = V_P2SB_IBDF_FUN; } soc_irq_settings(params); diff --git a/src/soc/intel/skylake/include/soc/systemagent.h b/src/soc/intel/skylake/include/soc/systemagent.h index d7dec65f58..565c885893 100644 --- a/src/soc/intel/skylake/include/soc/systemagent.h +++ b/src/soc/intel/skylake/include/soc/systemagent.h @@ -61,4 +61,14 @@ static const struct sa_mmio_descriptor soc_vtvc0_mmio_descriptor = { VTVC0_BASE_SIZE, "VTVC0BAR" }; + +/* Hardcoded default values for PCI Bus:Dev.Fun for IOAPIC and HPET */ +#define V_P2SB_IBDF_BUS 250 +#define V_P2SB_IBDF_DEV 31 +#define V_P2SB_IBDF_FUN 0 + +#define V_P2SB_HBDF_BUS 250 +#define V_P2SB_HBDF_DEV 15 +#define V_P2SB_HBDF_FUN 0 + #endif diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index ecd14289c2..002a284408 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -30,6 +30,7 @@ #include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/romstage.h> +#include <soc/systemagent.h> #include <string.h> #include <security/vboot/vboot_common.h> @@ -247,9 +248,9 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, if (!config->ignore_vtd) { m_cfg->PchHpetBdfValid = 1; - m_cfg->PchHpetBusNumber = 250; - m_cfg->PchHpetDeviceNumber = 15; - m_cfg->PchHpetFunctionNumber = 0; + m_cfg->PchHpetBusNumber = V_P2SB_HBDF_BUS; + m_cfg->PchHpetDeviceNumber = V_P2SB_HBDF_DEV; + m_cfg->PchHpetFunctionNumber = V_P2SB_HBDF_FUN; } } |