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-rw-r--r--src/soc/amd/common/block/include/amdblocks/acpimmio.h4
-rw-r--r--src/soc/amd/picasso/include/soc/southbridge.h2
-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h2
3 files changed, 2 insertions, 6 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/acpimmio.h b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
index 932ae47d7d..62f7190606 100644
--- a/src/soc/amd/common/block/include/amdblocks/acpimmio.h
+++ b/src/soc/amd/common/block/include/amdblocks/acpimmio.h
@@ -16,10 +16,10 @@
* this newer method of enable in PMx04.
*/
-#define ACPIMMIO_DECODE_REGISTER_24 0x24
+#define ACPIMMIO_DECODE_REGISTER_24 0x24
#define PM_24_ACPIMMIO_DECODE_EN BIT(0)
-#define ACPIMMIO_DECODE_REGISTER_04 0x4
+#define ACPIMMIO_DECODE_REGISTER_04 0x04
#define PM_04_BIOSRAM_DECODE_EN BIT(0)
#define PM_04_ACPIMMIO_DECODE_EN BIT(1)
diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h
index 6fdc5abce8..c0a5057e2c 100644
--- a/src/soc/amd/picasso/include/soc/southbridge.h
+++ b/src/soc/amd/picasso/include/soc/southbridge.h
@@ -27,8 +27,6 @@
#define CF9_IO_EN BIT(1)
#define LEGACY_IO_EN BIT(0)
#define SMB_ASF_IO_BASE 0x01 /* part of PM_DECODE_EN in PPR */
-#define PM_ISA_CONTROL 0x04
-#define MMIO_EN BIT(1)
#define PM_PCI_CTRL 0x08
#define FORCE_SLPSTATE_RETRY BIT(25)
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index e0ffd6102b..78fe583eef 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -18,8 +18,6 @@
#define PM_DECODE_EN 0x00
#define CF9_IO_EN BIT(1)
#define LEGACY_IO_EN BIT(0)
-#define PM_ISA_CONTROL 0x04
-#define MMIO_EN BIT(1)
#define PM_PCI_CTRL 0x08
#define FORCE_SLPSTATE_RETRY BIT(25)
#define FORCE_STPCLK_RETRY BIT(24)