diff options
-rw-r--r-- | src/mainboard/amd/torpedo/Oem.h | 2 | ||||
-rw-r--r-- | src/mainboard/amd/torpedo/platform_cfg.h | 18 | ||||
-rw-r--r-- | src/mainboard/siemens/sitemp_g1p1/mainboard.c | 28 |
3 files changed, 7 insertions, 41 deletions
diff --git a/src/mainboard/amd/torpedo/Oem.h b/src/mainboard/amd/torpedo/Oem.h index 915182e05d..f0788584a6 100644 --- a/src/mainboard/amd/torpedo/Oem.h +++ b/src/mainboard/amd/torpedo/Oem.h @@ -34,8 +34,6 @@ /** * PCIEX_BASE_ADDRESS - Define PCIE base address - * - * @param[Option] MOVE_PCIEBAR_TO_F0000000 Set PCIe base address to 0xF7000000 */ #ifdef MOVE_PCIEBAR_TO_F0000000 #define PCIEX_BASE_ADDRESS 0xF7000000 diff --git a/src/mainboard/amd/torpedo/platform_cfg.h b/src/mainboard/amd/torpedo/platform_cfg.h index 311214cbd8..6ff1476550 100644 --- a/src/mainboard/amd/torpedo/platform_cfg.h +++ b/src/mainboard/amd/torpedo/platform_cfg.h @@ -128,7 +128,7 @@ // #endif /** - * @section GecShadowRomBase + * @section GecShadowRomAddress */ #ifndef GEC_ROM_SHADOW_ADDRESS #define GEC_ROM_SHADOW_ADDRESS 0xFED61000 @@ -191,7 +191,7 @@ // #endif /** - * @section SataController + * @section InChipSataController * @li <b>0</b> - Disable * @li <b>1</b> - Enable */ @@ -200,7 +200,7 @@ #endif /** - * @section SataIdeCombMdPriSecOpt + * @section SataIdeCombModeChannel * @li <b>0</b> - Primary * @li <b>1</b> - Secondary<TD></TD> * Sata Controller set as primary or @@ -221,7 +221,7 @@ #endif /** - * @section SataIdeCombinedMode + * @section SataCombineMode * @li <b>0</b> - Disable * @li <b>1</b> - Enable * Sata IDE Controller set to Combined Mode @@ -738,12 +738,6 @@ #define IDE_DISUNUSED_IDE_S_CHANNEL 0 /** - * @section IdeDisUnusedIdeSChannel - * @li <b>0</b> - Disable - * @li <b>1</b> - Enable - */ - -/** * @section SataEspPort0 * @li <b>0</b> - Disable * @li <b>1</b> - Enable @@ -1219,10 +1213,10 @@ void SbPowerOnInit_Config(AMDSBCFG *sb_cfg); * * @param[in] func Southbridge CIMx Function ID. * @param[in] data Southbridge Input Data. - * @param[in] sb_cfg Southbridge configuration structure pointer. + * @param[in] config Southbridge configuration structure pointer. * */ -u32 sb900_callout_entry(u32 func, u32 data, void* sb_cfg); +u32 sb900_callout_entry(u32 func, u32 data, void* config); // definition for function in gpio.c void gpioEarlyInit (void); diff --git a/src/mainboard/siemens/sitemp_g1p1/mainboard.c b/src/mainboard/siemens/sitemp_g1p1/mainboard.c index 4b92877790..6e70f3a396 100644 --- a/src/mainboard/siemens/sitemp_g1p1/mainboard.c +++ b/src/mainboard/siemens/sitemp_g1p1/mainboard.c @@ -277,12 +277,6 @@ static int int15_handler(void) #endif /* ############################################################################################# */ - /** - * @brief - * - * @param - */ - static u8 calc_trange(u8 t_min, u8 t_max) { u8 prev; @@ -341,7 +335,6 @@ static void cable_detect(void) /** * @brief Detect the ADT7475 device * - * @param */ static const char * adt7475_detect( void ) { @@ -427,7 +420,6 @@ static void pm_init( void ) /** * @brief Setup thermal config on SINA Mainboard * - * @param */ static void set_thermal_config(void) @@ -604,12 +596,6 @@ static void set_thermal_config(void) } - /** - * @brief - * - * @param - */ - static void patch_mmio_nonposted( void ) { unsigned reg, index; @@ -649,12 +635,6 @@ static void patch_mmio_nonposted( void ) } } - /** - * @brief - * - * @param - */ - struct { unsigned int bus; unsigned int devfn; @@ -691,12 +671,6 @@ static void update_subsystemid( device_t dev ) } } - /** - * @brief - * - * @param - */ - static void detect_hw_variant( device_t dev ) { @@ -806,7 +780,7 @@ static void smm_lock( void ) /** * @brief Init * - * @param the root device + * @param dev - the root device */ static void mainboard_init(device_t dev) |