diff options
| -rw-r--r-- | src/drivers/amd/agesa/cache_as_ram.S | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/src/drivers/amd/agesa/cache_as_ram.S b/src/drivers/amd/agesa/cache_as_ram.S index e3e5735c3b..e429bba966 100644 --- a/src/drivers/amd/agesa/cache_as_ram.S +++ b/src/drivers/amd/agesa/cache_as_ram.S @@ -22,7 +22,6 @@ */ #include "gcccar.inc" -#include <cpu/x86/cache.h> #include <cpu/x86/post_code.h> .code32 @@ -35,15 +34,6 @@ _cache_as_ram_setup: post_code(0xa0) - /* enable SSE2 128bit instructions */ - /* Turn on OSFXSR [BIT9] and OSXMMEXCPT [BIT10] onto CR4 register */ - - movl %cr4, %eax - orl $(3 << 9), %eax - movl %eax, %cr4 - - post_code(0xa1) - AMD_ENABLE_STACK /* Align the stack. */ |