diff options
| -rw-r--r-- | src/southbridge/intel/lynxpoint/me.h | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/lynxpoint/me_9.x.c | 2 |
2 files changed, 1 insertions, 3 deletions
diff --git a/src/southbridge/intel/lynxpoint/me.h b/src/southbridge/intel/lynxpoint/me.h index ecd12e4ebf..a30582293d 100644 --- a/src/southbridge/intel/lynxpoint/me.h +++ b/src/southbridge/intel/lynxpoint/me.h @@ -201,8 +201,6 @@ struct me_hfs2 { #define PCI_ME_H_GS2 0x70 #define PCI_ME_MBP_GIVE_UP 0x01 -#define PCI_ME_H_GS3 0x74 - #define PCI_ME_HERES 0xbc #define PCI_ME_EXT_SHA1 0x00 #define PCI_ME_EXT_SHA256 0x02 diff --git a/src/southbridge/intel/lynxpoint/me_9.x.c b/src/southbridge/intel/lynxpoint/me_9.x.c index 63b520531b..2e790fc2a5 100644 --- a/src/southbridge/intel/lynxpoint/me_9.x.c +++ b/src/southbridge/intel/lynxpoint/me_9.x.c @@ -804,7 +804,7 @@ static void intel_me_mbp_give_up(device_t dev) struct mei_csr csr; reg32 = PCI_ME_MBP_GIVE_UP; - pci_write_config32(dev, PCI_ME_H_GS3, reg32); + pci_write_config32(dev, PCI_ME_H_GS2, reg32); read_host_csr(&csr); csr.reset = 1; csr.interrupt_generate = 1; |