summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/soc/intel/skylake/Kconfig9
-rw-r--r--src/soc/intel/skylake/microcode/Makefile.inc3
-rw-r--r--src/soc/intel/skylake/microcode/microcode_blob.c2
-rw-r--r--src/soc/intel/skylake/microcode/microcode_blob.h21
4 files changed, 1 insertions, 34 deletions
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index d3c541d40e..d21fe3a5a8 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -96,11 +96,6 @@ config DCACHE_RAM_SIZE
The size of the cache-as-ram region required during bootblock
and/or romstage.
-config EXTRA_MICROCODE_INCLUDE_PATH
- string "Include path for extra microcode patches."
- help
- The path to any extra microcode patches from other sources.
-
config HAVE_IFD_BIN
bool "Use Intel Firmware Descriptor from existing binary"
default n
@@ -166,10 +161,6 @@ config ME_BIN_PATH
depends on HAVE_ME_BIN
default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/me.bin"
-config MICROCODE_INCLUDE_PATH
- string
- default "src/soc/intel/skylake/microcode"
-
config MMCONF_BASE_ADDRESS
hex "MMIO Base Address"
default 0xe0000000
diff --git a/src/soc/intel/skylake/microcode/Makefile.inc b/src/soc/intel/skylake/microcode/Makefile.inc
index 2356b8467e..a5e89819a0 100644
--- a/src/soc/intel/skylake/microcode/Makefile.inc
+++ b/src/soc/intel/skylake/microcode/Makefile.inc
@@ -1,9 +1,6 @@
# Add CPU uCode source to list of files to build.
cpu_microcode-$(CONFIG_CPU_MICROCODE_CBFS_GENERATE) += microcode_blob.c
-# Include path for addition microcode sources.
-INCLUDES += -I$(CONFIG_EXTRA_MICROCODE_INCLUDE_PATH)
-
# This section overrides the default build process for the microcode to place
# it at a known location in the CBFS. This only needs to be enabled if FSP is
# being used.
diff --git a/src/soc/intel/skylake/microcode/microcode_blob.c b/src/soc/intel/skylake/microcode/microcode_blob.c
index 511c899d6b..48c1aa2835 100644
--- a/src/soc/intel/skylake/microcode/microcode_blob.c
+++ b/src/soc/intel/skylake/microcode/microcode_blob.c
@@ -19,6 +19,6 @@
*/
unsigned int microcode[] = {
-#include "microcode_blob.h"
+#include <microcode/microcode_blob.h>
};
diff --git a/src/soc/intel/skylake/microcode/microcode_blob.h b/src/soc/intel/skylake/microcode/microcode_blob.h
deleted file mode 100644
index 82a8664d71..0000000000
--- a/src/soc/intel/skylake/microcode/microcode_blob.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014 Google Inc.
- * Copyright (C) 2015 Intel Corporation.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-#include "MC0406E2_00000017_00000018.h"