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-rw-r--r--src/cpu/amd/model_gx2/cpu_setup.inc3
-rw-r--r--src/cpu/amd/model_gx2/gx_setup.inc2
-rw-r--r--src/include/cpu/amd/gx2def.h56
-rw-r--r--src/mainboard/amd/rumba/Config.lb4
-rw-r--r--src/mainboard/amd/rumba/auto.c77
5 files changed, 70 insertions, 72 deletions
diff --git a/src/cpu/amd/model_gx2/cpu_setup.inc b/src/cpu/amd/model_gx2/cpu_setup.inc
index ff35d3b570..c99b5336c6 100644
--- a/src/cpu/amd/model_gx2/cpu_setup.inc
+++ b/src/cpu/amd/model_gx2/cpu_setup.inc
@@ -9,7 +9,7 @@
/* copied for gx2 for ron minnich, as a placeholder */
/* USES: esi, ecx, eax */
-
+#if 0
#include <cpu/amd/gx2def.h>
movl %eax, %ebp /* preserve bist */
@@ -68,3 +68,4 @@ cpu_setup_end:
nop
movl %ebp, %eax /* Restore bist */
+#endif \ No newline at end of file
diff --git a/src/cpu/amd/model_gx2/gx_setup.inc b/src/cpu/amd/model_gx2/gx_setup.inc
index ce9d46d374..8da7eee801 100644
--- a/src/cpu/amd/model_gx2/gx_setup.inc
+++ b/src/cpu/amd/model_gx2/gx_setup.inc
@@ -8,6 +8,7 @@
#include <cpu/amd/gx2def.h>
+#if 0
movl %eax, %ebp /* Preserve bist */
gx_setup_start:
@@ -45,3 +46,4 @@ gx_setup_end:
nop
movl %ebp, %eax /* Restore bist */
+#endif
diff --git a/src/include/cpu/amd/gx2def.h b/src/include/cpu/amd/gx2def.h
index 6c359f6e4a..e69de29bb2 100644
--- a/src/include/cpu/amd/gx2def.h
+++ b/src/include/cpu/amd/gx2def.h
@@ -1,56 +0,0 @@
-/*
- freebios/src/northbridge/nsc/gx1/gx1def.inc
-
- Copyright (c) 2002 Christer Weinigel <wingel@hack.org>
-
- Defines for the GX1 processor
-*/
-/* now adapted for the gx2 by rminnich@lanl.gov
- */
-
-#define GX_BASE 0x040000000
-
-/**********************************************************************/
-/* Display Controller Registers, offset from GX_BASE */
-
-#define DC_UNLOCK 0x8300
-#define DC_UNLOCK_MAGIC 0x4758
-
-#define DC_GENERAL_CFG 0x8304
-
-/**********************************************************************/
-/* Bus Controller Registers, offset from GX_BASE */
-
-#define BC_DRAM_TOP 0x8000
-
-#define BC_XMAP_1 0x8004
-#define BC_XMAP_2 0x8008
-#define BC_XMAP_3 0x800c
-
-/**********************************************************************/
-/* Memory Controller Registers, offset from GX_BASE */
-
-#define MC_MEM_CNTRL1 0x8400
-#define SDCLKSTRT (1<<17)
-#define RFSHRATE (0x1ff<<8)
-#define RFSHSTAG (0x3<<6)
-#define X2CLKADDR (1<<5)
-#define RFSHTST (1<<4)
-#define XBUSARB (1<<3)
-#define SMM_MAP (1<<2)
-#define PROGRAM_SDRAM (1<<0)
-
-#define MC_MEM_CNTRL2 0x8404
-#define SDCLK_MASK 0x000003c0
-#define SDCLKOUT_MASK 0x00000400
-
-#define MC_BANK_CFG 0x8408
-#define DIMM_PG_SZ 0x00000070
-#define DIMM_SZ 0x00000700
-#define DIMM_COMP_BNK 0x00001000
-#define DIMM_MOD_BNK 0x00004000
-
-#define MC_SYNC_TIM1 0x840c
-
-#define MC_GBASE_ADD 0x8414
-
diff --git a/src/mainboard/amd/rumba/Config.lb b/src/mainboard/amd/rumba/Config.lb
index fe63c0e7d7..7a170791af 100644
--- a/src/mainboard/amd/rumba/Config.lb
+++ b/src/mainboard/amd/rumba/Config.lb
@@ -115,8 +115,8 @@ end
## Setup RAM
##
mainboardinit cpu/x86/fpu/enable_fpu.inc
-mainboardinit cpu/amd/model_gx1/cpu_setup.inc
-mainboardinit cpu/amd/model_gx1/gx_setup.inc
+mainboardinit cpu/amd/model_gx2/cpu_setup.inc
+mainboardinit cpu/amd/model_gx2/gx_setup.inc
mainboardinit ./auto.inc
##
diff --git a/src/mainboard/amd/rumba/auto.c b/src/mainboard/amd/rumba/auto.c
index 6ddf367bea..b15937126b 100644
--- a/src/mainboard/amd/rumba/auto.c
+++ b/src/mainboard/amd/rumba/auto.c
@@ -9,35 +9,86 @@
#include "pc80/serial.c"
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
-//#include "southbridge/intel/i440bx/i440bx_early_smbus.c"
-//#include "superio/NSC/pc97317/pc97317_early_serial.c"
-//#include "northbridge/intel/i440bx/raminit.h"
+#include "southbridge/amd/cs5535/cs5535_early_smbus.c"
+#include "superio/winbond/w83627hf/w83627hf_early_serial.c"
#include "cpu/x86/bist.h"
+#include "cpu/x86/msr.h"
-#define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1)
+#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-//#include "debug.c"
//#include "lib/delay.c"
-
+#include "northbridge/amd/gx2/raminit.h"
#include "northbridge/amd/gx2/raminit.c"
+#include "sdram/generic_sdram.c"
+
+static void msr_init(void)
+{
+
+ __builtin_wrmsr(0x1808, 0x22fffc02, 0x10f3bf00);
+
+ __builtin_wrmsr(0x10000020, 0xfff80, 0x20000000);
+ __builtin_wrmsr(0x10000021, 0x80fffe0, 0x20000000);
+ __builtin_wrmsr(0x10000026, 0x400fffc0, 0x2cfbc040);
+ __builtin_wrmsr(0x10000027, 0xfff00000, 0xff);
+ __builtin_wrmsr(0x10000028, 0x7bf00100, 0x2000000f);
+ __builtin_wrmsr(0x1000002c, 0xff030003, 0x20000000);
+ __builtin_wrmsr(0x10000080, 0x3, 0x0);
+
+ __builtin_wrmsr(0x40000020, 0xfff80, 0x20000000);
+ __builtin_wrmsr(0x40000021, 0x80fffe0, 0x20000000);
+ __builtin_wrmsr(0x40000023, 0x400fffc0, 0x20000040);
+ __builtin_wrmsr(0x40000024, 0xff4ffffc, 0x200000ef);
+ __builtin_wrmsr(0x40000029, 0x7bf00100, 0x2000000f);
+ __builtin_wrmsr(0x4000002d, 0xff030003, 0x20000000);
+
+ __builtin_wrmsr(0x400000e3, 0xf0309c10, 0x0);
+
+ __builtin_wrmsr(0xc0002001, 0x86002, 0x0);
+ __builtin_wrmsr(0x80002001, 0x86002, 0x0);
+ __builtin_wrmsr(0xa0002001, 0x86002, 0x0);
+ __builtin_wrmsr(0x50002001, 0x27, 0x0);
+ __builtin_wrmsr(0x4c002001, 0x1, 0x0);
+
+ __builtin_wrmsr(0x20000018, 0x3400, 0x10076013);
+ __builtin_wrmsr(0x20000019, 0x696332a3, 0x18000008);
+ __builtin_wrmsr(0x2000001a, 0x101, 0x0);
+
+ __builtin_wrmsr(0x2000001c, 0xff00ff, 0x0);
+ __builtin_wrmsr(0x2000001d, 0x0, 0x0);
+ __builtin_wrmsr(0x2000001f, 0x0, 0x0);
+ __builtin_wrmsr(0x20000020, 0x6, 0x0);
+
+}
+static pll_reset(void)
+{
+
+}
static void main(unsigned long bist)
{
-// pc97317_enable_serial(SERIAL_DEV, TTYS0_BASE);
+ static const struct mem_controller memctrl [] = {
+ {.channel0 = {(0xa<<3)|0, (0xa<<3)|1}}
+ };
+
+ msr_init();
+
+ w83627hf_enable_serial(SERIAL_DEV, TTYS0_BASE);
uart_init();
console_init();
- while (1)
- print_err("hi\n");
+
+ print_err("hi\n");
+
/* Halt if there was a built in self test failure */
- report_bist_failure(bist);
+ //report_bist_failure(bist);
- sdram_init();
+ sdram_initialize(1, memctrl);
/* Check all of memory */
+ ram_check(0x00000000, 1024*1024);
+
#if 0
ram_check(0x00000000, msr.lo);
-#endif
-#if 0
+
static const struct {
unsigned long lo, hi;
} check_addrs[] = {
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-01 02:23:49 +0000