diff options
| -rw-r--r-- | src/soc/intel/skylake/chip.h | 5 | ||||
| -rw-r--r-- | src/soc/intel/skylake/chip_fsp20.c | 5 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/soc/intel/skylake/chip.h b/src/soc/intel/skylake/chip.h index 1313dc15b9..fee14d8d7e 100644 --- a/src/soc/intel/skylake/chip.h +++ b/src/soc/intel/skylake/chip.h @@ -200,6 +200,8 @@ struct soc_intel_skylake_config { u8 SataSalpSupport; u8 SataPortsEnable[8]; u8 SataPortsDevSlp[8]; + u8 SataPortsSpinUp[8]; + u8 SataPortsHotPlug[8]; u8 SataSpeedLimit; /* Audio related */ @@ -587,6 +589,9 @@ struct soc_intel_skylake_config { /* Enable/Disable Sata power optimization */ u8 SataPwrOptEnable; + + /* Enable/Disable Sata test mode */ + u8 SataTestMode; }; typedef struct soc_intel_skylake_config config_t; diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index de869369a5..d1d7d6f50a 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -283,6 +283,10 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) sizeof(params->SataPortsEnable)); memcpy(params->SataPortsDevSlp, config->SataPortsDevSlp, sizeof(params->SataPortsDevSlp)); + memcpy(params->SataPortsHotPlug, config->SataPortsHotPlug, + sizeof(params->SataPortsHotPlug)); + memcpy(params->SataPortsSpinUp, config->SataPortsSpinUp, + sizeof(params->SataPortsSpinUp)); memcpy(params->PcieRpClkReqSupport, config->PcieRpClkReqSupport, sizeof(params->PcieRpClkReqSupport)); memcpy(params->PcieRpClkReqNumber, config->PcieRpClkReqNumber, @@ -369,6 +373,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) tconfig->PchLockDownGlobalSmi = config->LockDownConfigGlobalSmi; tconfig->PchLockDownRtcLock = config->LockDownConfigRtcLock; tconfig->PowerLimit4 = config->PowerLimit4; + tconfig->SataTestMode = config->SataTestMode; /* * To disable HECI, the Psf needs to be left unlocked * by FSP till end of post sequence. Based on the devicetree |