diff options
| -rw-r--r-- | src/mainboard/advansus/a785e-i/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/amd/dinar/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/amd/torpedo/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/asus/m5a88-v/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/avalue/eax-785e/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/supermicro/h8qgi/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/supermicro/h8scm/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/supermicro/x6dhr_ig2/romstage.c | 1 | ||||
| -rw-r--r-- | src/mainboard/tyan/s8226/romstage.c | 1 |
9 files changed, 0 insertions, 9 deletions
diff --git a/src/mainboard/advansus/a785e-i/romstage.c b/src/mainboard/advansus/a785e-i/romstage.c index c1366d52d4..490d1465e4 100644 --- a/src/mainboard/advansus/a785e-i/romstage.c +++ b/src/mainboard/advansus/a785e-i/romstage.c @@ -102,7 +102,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) w83627hf_set_clksel_48(PNP_DEV(0x2e, 0)); w83627hf_enable_serial(0, CONFIG_TTYS0_BASE); - uart_init(); console_init(); printk(BIOS_DEBUG, "\n"); diff --git a/src/mainboard/amd/dinar/romstage.c b/src/mainboard/amd/dinar/romstage.c index a124905fbc..91b385f6fc 100644 --- a/src/mainboard/amd/dinar/romstage.c +++ b/src/mainboard/amd/dinar/romstage.c @@ -70,7 +70,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) } post_code(0x31); - uart_init(); console_init(); /* diff --git a/src/mainboard/amd/torpedo/romstage.c b/src/mainboard/amd/torpedo/romstage.c index a2da0f011b..f6204b9000 100644 --- a/src/mainboard/amd/torpedo/romstage.c +++ b/src/mainboard/amd/torpedo/romstage.c @@ -62,7 +62,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) kbc1100_early_init(CONFIG_SIO_PORT); post_code(0x32); - uart_init(); post_code(0x33); console_init(); } diff --git a/src/mainboard/asus/m5a88-v/romstage.c b/src/mainboard/asus/m5a88-v/romstage.c index af8e5fa6dc..db8b7b5cf5 100644 --- a/src/mainboard/asus/m5a88-v/romstage.c +++ b/src/mainboard/asus/m5a88-v/romstage.c @@ -101,7 +101,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sb800_clk_output_48Mhz(); it8721f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - uart_init(); console_init(); printk(BIOS_DEBUG, "\n"); diff --git a/src/mainboard/avalue/eax-785e/romstage.c b/src/mainboard/avalue/eax-785e/romstage.c index 8d4e4b2b5a..69cefd9cc4 100644 --- a/src/mainboard/avalue/eax-785e/romstage.c +++ b/src/mainboard/avalue/eax-785e/romstage.c @@ -102,7 +102,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) w83627hf_set_clksel_48(PNP_DEV(CONFIG_SIO_PORT, 0)); w83627hf_enable_serial(0, CONFIG_TTYS0_BASE); - uart_init(); console_init(); printk(BIOS_DEBUG, "\n"); diff --git a/src/mainboard/supermicro/h8qgi/romstage.c b/src/mainboard/supermicro/h8qgi/romstage.c index e9f359ab86..ea4ed8eeff 100644 --- a/src/mainboard/supermicro/h8qgi/romstage.c +++ b/src/mainboard/supermicro/h8qgi/romstage.c @@ -52,7 +52,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sb7xx_51xx_disable_wideio(0); post_code(0x34); - uart_init(); post_code(0x35); console_init(); diff --git a/src/mainboard/supermicro/h8scm/romstage.c b/src/mainboard/supermicro/h8scm/romstage.c index 61640c9508..9ee1dfa694 100644 --- a/src/mainboard/supermicro/h8scm/romstage.c +++ b/src/mainboard/supermicro/h8scm/romstage.c @@ -57,7 +57,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sb7xx_51xx_disable_wideio(0); post_code(0x34); - uart_init(); post_code(0x35); console_init(); diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c index 7cfe818d70..4690a0c2fc 100644 --- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c +++ b/src/mainboard/supermicro/x6dhr_ig2/romstage.c @@ -64,7 +64,6 @@ static void main(unsigned long bist) w83627hf_set_clksel_48(DUMMY_DEV); w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE); - uart_init(); console_init(); /* Halt if there was a built in self test failure */ diff --git a/src/mainboard/tyan/s8226/romstage.c b/src/mainboard/tyan/s8226/romstage.c index f0b21e2ffc..a6c33e81a3 100644 --- a/src/mainboard/tyan/s8226/romstage.c +++ b/src/mainboard/tyan/s8226/romstage.c @@ -58,7 +58,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sb7xx_51xx_disable_wideio(0); post_code(0x34); - uart_init(); post_code(0x35); console_init(); |