diff options
| -rw-r--r-- | src/mainboard/google/stout/Kconfig | 2 | ||||
| -rw-r--r-- | src/mainboard/lenovo/t420s/Kconfig | 2 | ||||
| -rw-r--r-- | src/mainboard/lenovo/t430s/Kconfig | 2 | ||||
| -rw-r--r-- | src/mainboard/lenovo/t520/Kconfig | 2 | ||||
| -rw-r--r-- | src/mainboard/lenovo/t530/Kconfig | 2 | ||||
| -rw-r--r-- | src/mainboard/lenovo/x220/Kconfig | 2 | ||||
| -rw-r--r-- | src/mainboard/lenovo/x230/Kconfig | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/Kconfig | 7 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/Makefile.inc | 4 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/gma.h | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c | 4 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c | 5 | ||||
| -rw-r--r-- | util/autoport/sandybridge.go | 2 |
13 files changed, 20 insertions, 18 deletions
diff --git a/src/mainboard/google/stout/Kconfig b/src/mainboard/google/stout/Kconfig index 0e2379415a..197099e50c 100644 --- a/src/mainboard/google/stout/Kconfig +++ b/src/mainboard/google/stout/Kconfig @@ -15,7 +15,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_LPC_TPM select INTEL_INT15 - select IVYBRIDGE_LVDS + select SANDYBRIDGE_IVYBRIDGE_LVDS config CHROMEOS select CHROMEOS_VBNV_CMOS diff --git a/src/mainboard/lenovo/t420s/Kconfig b/src/mainboard/lenovo/t420s/Kconfig index ce81af729e..dc27902789 100644 --- a/src/mainboard/lenovo/t420s/Kconfig +++ b/src/mainboard/lenovo/t420s/Kconfig @@ -16,7 +16,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_CMOS_DEFAULT select HAVE_ACPI_RESUME select INTEL_INT15 - select SANDYBRIDGE_LVDS + select SANDYBRIDGE_IVYBRIDGE_LVDS select MAINBOARD_HAS_LPC_TPM # Workaround for EC/KBC IRQ1. diff --git a/src/mainboard/lenovo/t430s/Kconfig b/src/mainboard/lenovo/t430s/Kconfig index cec1b146a3..4e55eda63e 100644 --- a/src/mainboard/lenovo/t430s/Kconfig +++ b/src/mainboard/lenovo/t430s/Kconfig @@ -16,7 +16,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_CMOS_DEFAULT select HAVE_ACPI_RESUME select INTEL_INT15 - select IVYBRIDGE_LVDS + select SANDYBRIDGE_IVYBRIDGE_LVDS select ENABLE_VMX select MAINBOARD_HAS_LPC_TPM diff --git a/src/mainboard/lenovo/t520/Kconfig b/src/mainboard/lenovo/t520/Kconfig index 66a5c64e3b..d5cee9e7d5 100644 --- a/src/mainboard/lenovo/t520/Kconfig +++ b/src/mainboard/lenovo/t520/Kconfig @@ -16,7 +16,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_CMOS_DEFAULT select HAVE_ACPI_RESUME select INTEL_INT15 - select SANDYBRIDGE_LVDS + select SANDYBRIDGE_IVYBRIDGE_LVDS select MAINBOARD_HAS_LPC_TPM # Workaround for EC/KBC IRQ1. diff --git a/src/mainboard/lenovo/t530/Kconfig b/src/mainboard/lenovo/t530/Kconfig index f3b378a727..257621f0e1 100644 --- a/src/mainboard/lenovo/t530/Kconfig +++ b/src/mainboard/lenovo/t530/Kconfig @@ -16,7 +16,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_CMOS_DEFAULT select HAVE_ACPI_RESUME select INTEL_INT15 - select IVYBRIDGE_LVDS + select SANDYBRIDGE_IVYBRIDGE_LVDS select MAINBOARD_DO_NATIVE_VGA_INIT # default to native vga init select ENABLE_VMX select MAINBOARD_HAS_LPC_TPM diff --git a/src/mainboard/lenovo/x220/Kconfig b/src/mainboard/lenovo/x220/Kconfig index fe25a9e5ff..d30cbdca88 100644 --- a/src/mainboard/lenovo/x220/Kconfig +++ b/src/mainboard/lenovo/x220/Kconfig @@ -16,7 +16,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_CMOS_DEFAULT select HAVE_ACPI_RESUME select INTEL_INT15 - select SANDYBRIDGE_LVDS + select SANDYBRIDGE_IVYBRIDGE_LVDS select DRIVERS_RICOH_RCE822 select MAINBOARD_HAS_LPC_TPM diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig index f644024fed..3db0338e8d 100644 --- a/src/mainboard/lenovo/x230/Kconfig +++ b/src/mainboard/lenovo/x230/Kconfig @@ -16,7 +16,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy select HAVE_CMOS_DEFAULT select HAVE_ACPI_RESUME select INTEL_INT15 - select IVYBRIDGE_LVDS + select SANDYBRIDGE_IVYBRIDGE_LVDS select DRIVERS_RICOH_RCE822 select MAINBOARD_HAS_LPC_TPM diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig index f435f856f6..9b90f36178 100644 --- a/src/northbridge/intel/sandybridge/Kconfig +++ b/src/northbridge/intel/sandybridge/Kconfig @@ -51,12 +51,7 @@ config CACHE_MRC_SIZE_KB int default 512 -config IVYBRIDGE_LVDS - def_bool n - select MAINBOARD_HAS_NATIVE_VGA_INIT - select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG - -config SANDYBRIDGE_LVDS +config SANDYBRIDGE_IVYBRIDGE_LVDS def_bool n select MAINBOARD_HAS_NATIVE_VGA_INIT select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index a58d9b1f69..4a7a854bee 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -18,8 +18,8 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE)$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDG ramstage-y += ram_calc.c ramstage-y += northbridge.c ramstage-y += gma.c -ramstage-$(CONFIG_IVYBRIDGE_LVDS) += gma_ivybridge_lvds.c -ramstage-$(CONFIG_SANDYBRIDGE_LVDS) += gma_sandybridge_lvds.c +ramstage-$(CONFIG_SANDYBRIDGE_IVYBRIDGE_LVDS) += gma_sandybridge_lvds.c +ramstage-$(CONFIG_SANDYBRIDGE_IVYBRIDGE_LVDS) += gma_ivybridge_lvds.c ramstage-y += acpi.c ramstage-y += mrccache.c diff --git a/src/northbridge/intel/sandybridge/gma.h b/src/northbridge/intel/sandybridge/gma.h index 0832468498..534b42e151 100644 --- a/src/northbridge/intel/sandybridge/gma.h +++ b/src/northbridge/intel/sandybridge/gma.h @@ -117,5 +117,7 @@ struct i915_gpu_controller_info; int i915lightup_sandy(const struct i915_gpu_controller_info *info, u32 physbase, u16 pio, u8 *mmio, u32 lfb); +int i915lightup_ivy(const struct i915_gpu_controller_info *info, + u32 physbase, u16 pio, u8 *mmio, u32 lfb); #endif /* NORTHBRIDGE_INTEL_SANDYBRIDGE_GMA_H */ diff --git a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c index 1d7611ff40..f6818dde30 100644 --- a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c +++ b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c @@ -153,8 +153,8 @@ static void enable_port(u8 *mmio) read32(mmio + 0xc4000); } -int i915lightup_sandy(const struct i915_gpu_controller_info *info, - u32 physbase, u16 piobase, u8 *mmio, u32 lfb) +int i915lightup_ivy(const struct i915_gpu_controller_info *info, + u32 physbase, u16 piobase, u8 *mmio, u32 lfb) { int i; u8 edid_data[128]; diff --git a/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c index e18f1464f3..3b4b64c3d8 100644 --- a/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c +++ b/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c @@ -24,6 +24,7 @@ #include <drivers/intel/gma/i915.h> #include "gma.h" #include "chip.h" +#include "sandybridge.h" #include <pc80/vga.h> #include <pc80/vga_io.h> #include <device/pci_def.h> @@ -142,6 +143,10 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info, if (!IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) return 0; + if ((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_IVB) { + return i915lightup_ivy(info, physbase, piobase, mmio, lfb); + } + write32(mmio + 0x00070080, 0x00000000); write32(mmio + DSPCNTR(0), 0x00000000); write32(mmio + 0x00071180, 0x00000000); diff --git a/util/autoport/sandybridge.go b/util/autoport/sandybridge.go index 4ef6609b45..86142e8cb9 100644 --- a/util/autoport/sandybridge.go +++ b/util/autoport/sandybridge.go @@ -110,7 +110,7 @@ func (i sandybridgemc) Scan(ctx Context, addr PCIDevData) { PutPCIDev(addr, "Host bridge") /* FIXME:XX some configs are unsupported. */ - KconfigBool[i.variant+"BRIDGE_LVDS"] = true + KconfigBool["SANDYBRIDGE_IVYBRIDGE_LVDS"] = true KconfigBool["CPU_INTEL_SOCKET_RPGA989"] = true KconfigBool["NORTHBRIDGE_INTEL_"+i.variant+"BRIDGE"] = true |