aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/commonlib/include/commonlib/cbmem_id.h1
-rw-r--r--src/drivers/intel/fsp1_1/Kconfig12
-rw-r--r--src/drivers/intel/fsp1_1/Makefile.inc7
-rw-r--r--src/drivers/intel/fsp1_1/include/fsp/ramstage.h1
-rw-r--r--src/drivers/intel/fsp1_1/logo.c (renamed from src/mainboard/facebook/fbg1701/logo.h)18
-rw-r--r--src/drivers/intel/fsp1_1/ramstage.c14
-rw-r--r--src/mainboard/facebook/fbg1701/Kconfig9
-rw-r--r--src/mainboard/facebook/fbg1701/Makefile.inc6
-rw-r--r--src/mainboard/facebook/fbg1701/logo.c46
-rw-r--r--src/mainboard/facebook/fbg1701/ramstage.c13
10 files changed, 46 insertions, 81 deletions
diff --git a/src/commonlib/include/commonlib/cbmem_id.h b/src/commonlib/include/commonlib/cbmem_id.h
index 54a0dee55a..b063cd1937 100644
--- a/src/commonlib/include/commonlib/cbmem_id.h
+++ b/src/commonlib/include/commonlib/cbmem_id.h
@@ -79,6 +79,7 @@
#define CBMEM_ID_ROM2 0x524f4d32
#define CBMEM_ID_ROM3 0x524f4d33
#define CBMEM_ID_FMAP 0x464d4150
+#define CBMEM_ID_FSP_LOGO 0x4c4f474f
#define CBMEM_ID_TO_NAME_TABLE \
{ CBMEM_ID_ACPI, "ACPI " }, \
diff --git a/src/drivers/intel/fsp1_1/Kconfig b/src/drivers/intel/fsp1_1/Kconfig
index 5f8f5b5534..989c4547f5 100644
--- a/src/drivers/intel/fsp1_1/Kconfig
+++ b/src/drivers/intel/fsp1_1/Kconfig
@@ -91,4 +91,16 @@ config SKIP_FSP_CAR
help
Selected by platforms that implement their own CAR setup.
+config FSP1_1_DISPLAY_LOGO
+ bool "Enable logo"
+ default n
+ help
+ Uses the FSP to display the boot logo. This method supports a
+ BMP file only. The uncompressed size can be up to 1 MB.
+
+config FSP1_1_LOGO_FILE_NAME
+ string "Logo file"
+ depends on FSP1_1_DISPLAY_LOGO
+ default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/logo.bmp"
+
endif #PLATFORM_USES_FSP1_1
diff --git a/src/drivers/intel/fsp1_1/Makefile.inc b/src/drivers/intel/fsp1_1/Makefile.inc
index 014311897f..7b08fb4408 100644
--- a/src/drivers/intel/fsp1_1/Makefile.inc
+++ b/src/drivers/intel/fsp1_1/Makefile.inc
@@ -32,6 +32,7 @@ ramstage-$(CONFIG_RUN_FSP_GOP) += fsp_gop.c
ramstage-y += fsp_relocate.c
ramstage-y += fsp_util.c
ramstage-y += hob.c
+ramstage-$(CONFIG_FSP1_1_DISPLAY_LOGO) += logo.c
ramstage-y += ramstage.c
ramstage-$(CONFIG_INTEL_GMA_ADD_VBT) += vbt.c
ramstage-$(CONFIG_MMA) += mma_core.c
@@ -53,4 +54,10 @@ fsp.bin-options := --xip $(TXTIBB)
fsp.bin-COREBOOT-position := $(CONFIG_FSP_LOC)
endif
+# Add logo to the cbfs image
+cbfs-files-$(CONFIG_FSP1_1_DISPLAY_LOGO) += logo.bmp
+logo.bmp-file := $(call strip_quotes,$(CONFIG_FSP1_1_LOGO_FILE_NAME))
+logo.bmp-type := raw
+logo.bmp-compression := LZMA
+
endif
diff --git a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
index 1c9210b464..a5eac0e279 100644
--- a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
+++ b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
@@ -33,6 +33,7 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params);
void mainboard_silicon_init_params(SILICON_INIT_UPD *params);
void soc_display_silicon_init_params(const SILICON_INIT_UPD *old,
SILICON_INIT_UPD *new);
+void load_logo(SILICON_INIT_UPD *params);
void load_vbt(uint8_t s3_resume, SILICON_INIT_UPD *params);
#endif /* _INTEL_COMMON_RAMSTAGE_H_ */
diff --git a/src/mainboard/facebook/fbg1701/logo.h b/src/drivers/intel/fsp1_1/logo.c
index 0682d3fa2d..03b2715f43 100644
--- a/src/mainboard/facebook/fbg1701/logo.h
+++ b/src/drivers/intel/fsp1_1/logo.c
@@ -1,8 +1,6 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2019 Eltan B.V.
- *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
@@ -13,9 +11,15 @@
* GNU General Public License for more details.
*/
-#ifndef LOGO_H
-#define LOGO_H
-
-void *load_logo(size_t *logo_size);
+#include <soc/ramstage.h>
+#include <console/console.h>
+#include <fsp/ramstage.h>
+#include <include/cbfs.h>
-#endif
+void load_logo(SILICON_INIT_UPD *params)
+{
+ params->PcdLogoSize = cbfs_boot_load_file("logo.bmp", (void *)params->PcdLogoPtr,
+ params->PcdLogoSize, CBFS_TYPE_RAW);
+ if (!params->PcdLogoSize)
+ params->PcdLogoPtr = 0;
+}
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index d278d08ed2..70bedc50af 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -21,6 +21,7 @@
#include <stage_cache.h>
#include <string.h>
#include <timestamp.h>
+#include <cbmem.h>
/* SOC initialization after FSP silicon init */
__weak void soc_after_silicon_init(void)
@@ -68,6 +69,7 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
EFI_STATUS status;
UPD_DATA_REGION *upd_ptr;
VPD_DATA_REGION *vpd_ptr;
+ const struct cbmem_entry *logo_entry;
/* Display the FSP header */
if (fsp_info_header == NULL) {
@@ -94,6 +96,14 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
load_vbt(is_s3_wakeup, &silicon_init_params);
mainboard_silicon_init_params(&silicon_init_params);
+ if (CONFIG(FSP1_1_DISPLAY_LOGO) && !is_s3_wakeup) {
+ silicon_init_params.PcdLogoSize = 1 * MiB;
+ logo_entry = cbmem_entry_add(CBMEM_ID_FSP_LOGO,
+ silicon_init_params.PcdLogoSize);
+ silicon_init_params.PcdLogoPtr = (UINT32)cbmem_entry_start(logo_entry);
+ load_logo(&silicon_init_params);
+ }
+
/* Display the UPD data */
if (CONFIG(DISPLAY_UPD_DATA))
soc_display_silicon_init_params(original_params,
@@ -111,6 +121,10 @@ void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
timestamp_add_now(TS_FSP_SILICON_INIT_END);
printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);
+ /* The logo_entry can be freed up now as it is not required any longer */
+ if (CONFIG(FSP1_1_DISPLAY_LOGO) && !is_s3_wakeup)
+ cbmem_entry_remove(logo_entry);
+
/* Mark graphics init done after SiliconInit if VBT was provided */
#if CONFIG(RUN_FSP_GOP)
/* GraphicsConfigPtr doesn't exist in Quark X1000's FSP, so this needs
diff --git a/src/mainboard/facebook/fbg1701/Kconfig b/src/mainboard/facebook/fbg1701/Kconfig
index 41d59ff450..5e71db018a 100644
--- a/src/mainboard/facebook/fbg1701/Kconfig
+++ b/src/mainboard/facebook/fbg1701/Kconfig
@@ -58,15 +58,6 @@ config FSP_LOC
hex
default 0xfff9c000
-config FSP1_1_DISPLAY_LOGO
- bool "Enable logo"
- default n
-
-config FSP1_1_LOGO_FILE_NAME
- string "Logo file"
- depends on FSP1_1_DISPLAY_LOGO
- default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/logo.bmp"
-
config VENDORCODE_ELTAN_OEM_MANIFEST_LOC
hex
default 0xFFFE9000
diff --git a/src/mainboard/facebook/fbg1701/Makefile.inc b/src/mainboard/facebook/fbg1701/Makefile.inc
index a273f41682..ac4e571653 100644
--- a/src/mainboard/facebook/fbg1701/Makefile.inc
+++ b/src/mainboard/facebook/fbg1701/Makefile.inc
@@ -28,17 +28,11 @@ ramstage-y += cpld.c
ramstage-y += gpio.c
ramstage-y += hda_verb.c
ramstage-y += irqroute.c
-ramstage-$(CONFIG_FSP1_1_DISPLAY_LOGO) += logo.c
ramstage-y += ramstage.c
ramstage-y += w25q64.c
romstage-y += cpld.c
-cbfs-files-$(CONFIG_FSP1_1_DISPLAY_LOGO) += logo.bmp
-logo.bmp-file := $(call strip_quotes,$(CONFIG_FSP1_1_LOGO_FILE_NAME))
-logo.bmp-type := raw
-logo.bmp-compression := LZMA
-
# Order of names in SPD_SOURCES is important!
SPD_SOURCES = SAMSUNG_K4B8G1646D-MYKO
SPD_SOURCES += MICRON_MT41K512M16HA-125A
diff --git a/src/mainboard/facebook/fbg1701/logo.c b/src/mainboard/facebook/fbg1701/logo.c
deleted file mode 100644
index 3823c71fdc..0000000000
--- a/src/mainboard/facebook/fbg1701/logo.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2017 Patrick Rudolph <siro@das-labor.org>
- * Copyright (C) 2018-2019 Eltan B.V.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <soc/ramstage.h>
-#include <console/console.h>
-#include <include/cbfs.h>
-#include "logo.h"
-
-static char logo_data[1 * MiB];
-static size_t logo_data_sz = 0;
-
-void *load_logo(size_t *logo_size)
-{
- const char *filename = "logo.bmp";
-
- if (logo_data_sz != 0) {
- if (logo_size)
- *logo_size = logo_data_sz;
- return (void *)logo_data;
- }
-
- logo_data_sz =
- cbfs_boot_load_file(filename, logo_data, sizeof(logo_data), CBFS_TYPE_RAW);
- if (logo_data_sz == 0)
- return NULL;
-
- if (logo_size)
- *logo_size = logo_data_sz;
-
- printk(BIOS_DEBUG, "Found a Logo of %zu bytes after decompression\n", logo_data_sz);
-
- return (void *)logo_data;
-}
diff --git a/src/mainboard/facebook/fbg1701/ramstage.c b/src/mainboard/facebook/fbg1701/ramstage.c
index 9b25b983f7..055c733fef 100644
--- a/src/mainboard/facebook/fbg1701/ramstage.c
+++ b/src/mainboard/facebook/fbg1701/ramstage.c
@@ -19,7 +19,6 @@
#include <soc/ramstage.h>
#include <soc/smbus.h>
#include "cpld.h"
-#include "logo.h"
struct edp_data {
u8 payload_length;
@@ -359,16 +358,4 @@ static void mainboard_configure_edp_bridge(void)
void mainboard_silicon_init_params(SILICON_INIT_UPD *params)
{
mainboard_configure_edp_bridge();
-
- if (CONFIG(FSP1_1_DISPLAY_LOGO)) {
- size_t logo_len;
- void *logo = NULL;
-
- logo = load_logo(&logo_len);
-
- if (logo) {
- params->PcdLogoPtr = (u32)logo;
- params->PcdLogoSize = logo_len;
- }
- }
}