diff options
-rw-r--r-- | src/arch/x86/Makefile.inc | 2 | ||||
-rw-r--r-- | src/arch/x86/include/arch/memlayout.h | 25 | ||||
-rw-r--r-- | src/arch/x86/ramstage.ld | 2 | ||||
-rw-r--r-- | src/include/memlayout.h | 35 | ||||
-rw-r--r-- | src/include/symbols.h | 15 | ||||
-rw-r--r-- | src/lib/Makefile.inc | 3 | ||||
-rw-r--r-- | src/lib/program.ld (renamed from src/lib/ramstage.ld) | 104 |
7 files changed, 120 insertions, 66 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 10a94c3a32..3c1871e6e7 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -295,7 +295,7 @@ $(objcbfs)/ramstage.elf: $(objcbfs)/ramstage.debug.rmod else -ramstage-srcs += $(src)/arch/x86/ramstage.ld +ramstage-y += ramstage.ld $(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(obj)/arch/x86/ramstage.ramstage.ld @printf " CC $(subst $(obj)/,,$(@))\n" diff --git a/src/arch/x86/include/arch/memlayout.h b/src/arch/x86/include/arch/memlayout.h new file mode 100644 index 0000000000..54b8b4a308 --- /dev/null +++ b/src/arch/x86/include/arch/memlayout.h @@ -0,0 +1,25 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#ifndef __ARCH_MEMLAYOUT_H +#define __ARCH_MEMLAYOUT_H + +/* Currently empty to satisfy common arch requirements. */ + +#endif /* __ARCH_MEMLAYOUT_H */ diff --git a/src/arch/x86/ramstage.ld b/src/arch/x86/ramstage.ld index 5fcbbb632a..c9b2f17730 100644 --- a/src/arch/x86/ramstage.ld +++ b/src/arch/x86/ramstage.ld @@ -19,7 +19,7 @@ SECTIONS { . = CONFIG_RAMBASE; - INCLUDE "lib/ramstage.ramstage.ld" + INCLUDE "lib/program.ramstage.ld" _ = ASSERT( ( _eprogram < (CONFIG_RAMTOP)) , "Please increase CONFIG_RAMTOP"); } diff --git a/src/include/memlayout.h b/src/include/memlayout.h index a5296286b2..f0ee3d3f77 100644 --- a/src/include/memlayout.h +++ b/src/include/memlayout.h @@ -22,10 +22,37 @@ #ifndef __MEMLAYOUT_H #define __MEMLAYOUT_H +#include <rules.h> #include <arch/memlayout.h> +/* Macros that the architecture can override. */ +#ifndef ARCH_POINTER_ALIGN_SIZE +#define ARCH_POINTER_ALIGN_SIZE 8 +#endif + +#ifndef ARCH_CACHELINE_ALIGN_SIZE +#define ARCH_CACHELINE_ALIGN_SIZE 64 +#endif + +/* Default to data as well as bss. */ +#ifndef ARCH_STAGE_HAS_DATA_SECTION +#define ARCH_STAGE_HAS_DATA_SECTION 1 +#endif + +#ifndef ARCH_STAGE_HAS_BSS_SECTION +#define ARCH_STAGE_HAS_BSS_SECTION 1 +#endif + +/* Default is that currently ramstage and smm only has a heap. */ +#ifndef ARCH_STAGE_HAS_HEAP_SECTION +#define ARCH_STAGE_HAS_HEAP_SECTION (ENV_RAMSTAGE || ENV_SMM) +#endif + #define STR(x) #x +#define ALIGN_COUNTER(align) \ + . = ALIGN(align); + #define SET_COUNTER(name, addr) \ _ = ASSERT(. <= addr, STR(name overlaps the previous region!)); \ . = addr; @@ -58,7 +85,7 @@ /* TODO: This only works if you never access CBFS in romstage before RAM is up! * If you need to change that assumption, you have some work ahead of you... */ -#if defined(__PRE_RAM__) && !defined(__ROMSTAGE__) +#if defined(__PRE_RAM__) && !ENV_ROMSTAGE #define PRERAM_CBFS_CACHE(addr, size) CBFS_CACHE(addr, size) #define POSTRAM_CBFS_CACHE(addr, size) \ REGION(unused_cbfs_cache, addr, size, 4) @@ -93,12 +120,12 @@ . += sz; #endif -#ifdef __RAMSTAGE__ +#if ENV_RAMSTAGE #define RAMSTAGE(addr, sz) \ SET_COUNTER(ramstage, addr) \ - _ = ASSERT(_eramstage - _ramstage <= sz, \ + _ = ASSERT(_eprogram - _program <= sz, \ STR(Ramstage exceeded its allotted size! (sz))); \ - INCLUDE "lib/ramstage.ramstage.ld" + INCLUDE "lib/program.ramstage.ld" #else #define RAMSTAGE(addr, sz) \ SET_COUNTER(ramstage, addr) \ diff --git a/src/include/symbols.h b/src/include/symbols.h index 3fbf819902..22cd575034 100644 --- a/src/include/symbols.h +++ b/src/include/symbols.h @@ -53,20 +53,7 @@ extern u8 _payload[]; extern u8 _epayload[]; #define _payload_size (_epayload - _payload) -/* Careful: _e<stage> and _<stage>_size only defined for the current stage! */ -extern u8 _bootblock[]; -extern u8 _ebootblock[]; -#define _bootblock_size (_ebootblock - _bootblock) - -extern u8 _romstage[]; -extern u8 _eromstage[]; -#define _romstage_size (_eromstage - _romstage) - -extern u8 _ramstage[]; -extern u8 _eramstage[]; -#define _ramstage_size (_eramstage - _ramstage) - -/* "program" always refers to the current execution unit, except for x86 ROM. */ +/* "program" always refers to the current execution unit. */ extern u8 _program[]; extern u8 _eprogram[]; #define _program_size (_eprogram - _program) diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 85976672a8..cd2b70a81f 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -197,7 +197,8 @@ ifneq ($(CONFIG_ARCH_X86),y) bootblock-y += bootblock.ld romstage-y += romstage.ld endif -ramstage-y += ramstage.ld + +ramstage-y += program.ld ifeq ($(CONFIG_RELOCATABLE_MODULES),y) ramstage-y += rmodule.c diff --git a/src/lib/ramstage.ld b/src/lib/program.ld index b224827590..1346eafbf8 100644 --- a/src/lib/ramstage.ld +++ b/src/lib/program.ld @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright 2014 Google Inc. + * Copyright 2015 Google Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -17,6 +17,8 @@ * Foundation, Inc. */ +#include <memlayout.h> + /* This file is included inside a SECTIONS block */ /* First we place the code and read only data (typically const declared). @@ -24,19 +26,40 @@ */ .text : { _program = .; - _ramstage = .; _text = .; *(.text._start); *(.text.stage_entry); *(.text); *(.text.*); - . = ALIGN(16); + +#if ENV_RAMSTAGE || ENV_ROMSTAGE + . = ALIGN(ARCH_POINTER_ALIGN_SIZE); + _cbmem_init_hooks = .; + KEEP(*(.rodata.cbmem_init_hooks)); + _ecbmem_init_hooks = .; +#endif + +#if ENV_RAMSTAGE + . = ALIGN(ARCH_POINTER_ALIGN_SIZE); + _pci_drivers = .; + KEEP(*(.rodata.pci_driver)); + _epci_drivers = .; + . = ALIGN(ARCH_POINTER_ALIGN_SIZE); + _cpu_drivers = .; + KEEP(*(.rodata.cpu_driver)); + _ecpu_drivers = .; +#endif + + . = ALIGN(ARCH_POINTER_ALIGN_SIZE); + *(.rodata); + *(.rodata.*); + . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _etext = .; } : to_load -#if IS_ENABLED(CONFIG_COVERAGE) +#if ENV_RAMSTAGE && IS_ENABLED(CONFIG_COVERAGE) .ctors : { - . = ALIGN(0x100); + . = ALIGN(0x100) __CTOR_LIST__ = .; KEEP(*(.ctors)); LONG(0); @@ -45,71 +68,62 @@ } #endif -/* TODO: align data sections to cache lines? (is that really useful?) */ -.rodata : { - _rodata = .; - . = ALIGN(8); +/* Include data, bss, and heap in that order. Not defined for all stages. */ +#if ARCH_STAGE_HAS_DATA_SECTION +.data : { + . = ALIGN(ARCH_CACHELINE_ALIGN_SIZE); + _data = .; + *(.data); + *(.data.*); - /* If any changes are made to the driver start/symbols or the - * section names the equivalent changes need to made to - * rmodule.ld. */ - _pci_drivers = . ; - KEEP(*(.rodata.pci_driver)); - _epci_drivers = . ; - _cpu_drivers = . ; - KEEP(*(.rodata.cpu_driver)); - _ecpu_drivers = . ; +#ifdef __PRE_RAM__ + PROVIDE(_preram_cbmem_console = .); + PROVIDE(_epreram_cbmem_console = _preram_cbmem_console); +#elif ENV_RAMSTAGE + . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _bs_init_begin = .; KEEP(*(.bs_init)); LONG(0); LONG(0); - _bs_init_end = .; - _cbmem_init_hooks = .; - KEEP(*(.rodata.cbmem_init_hooks)); - _ecbmem_init_hooks = .; - - *(.rodata) - *(.rodata.*) - /* kevinh/Ispiri - Added an align, because the objcopy tool - * incorrectly converts sections that are not long word aligned. - */ - . = ALIGN(8); - - _erodata = .; -} + _ebs_init_begin = .; +#endif -.data : { - /* Move to different cache line to avoid false sharing with .rodata. */ - . = ALIGN(64); /* May not be actual line size, not that important. */ - _data = .; - *(.data) - *(.data.*) + . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _edata = .; } +#endif -.bss . : { +#if ARCH_STAGE_HAS_BSS_SECTION +.bss : { + . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _bss = .; *(.bss) *(.bss.*) *(.sbss) *(.sbss.*) + . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _ebss = .; } +#endif -.heap . : { +#if ARCH_STAGE_HAS_HEAP_SECTION +.heap : { + . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _heap = .; - /* Reserve CONFIG_HEAP_SIZE bytes for the heap */ - . += CONFIG_HEAP_SIZE ; - . = ALIGN(4); + . += CONFIG_HEAP_SIZE; + . = ALIGN(ARCH_POINTER_ALIGN_SIZE); _eheap = .; - _eramstage = .; - _eprogram = .; } +#endif + +_eprogram = .; /* Discard the sections we don't need/want */ /DISCARD/ : { *(.comment) + *(.comment.*) *(.note) *(.note.*) + *(.eh_frame); } |