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-rw-r--r--src/mainboard/google/rush_ryu/chromeos.c10
-rw-r--r--src/mainboard/google/rush_ryu/gpio.h10
-rw-r--r--src/mainboard/google/rush_ryu/reset.c4
3 files changed, 17 insertions, 7 deletions
diff --git a/src/mainboard/google/rush_ryu/chromeos.c b/src/mainboard/google/rush_ryu/chromeos.c
index 401cf9372e..9446ae0b96 100644
--- a/src/mainboard/google/rush_ryu/chromeos.c
+++ b/src/mainboard/google/rush_ryu/chromeos.c
@@ -23,16 +23,16 @@
#include <ec/google/chromeec/ec_commands.h>
#include <string.h>
#include <vendorcode/google/chromeos/chromeos.h>
-#include <soc/nvidia/tegra132/gpio.h>
+#include "gpio.h"
void fill_lb_gpios(struct lb_gpios *gpios)
{
int count = 0;
/* Write Protect: active low */
- gpios->gpios[count].port = GPIO_R1_INDEX;
+ gpios->gpios[count].port = WRITE_PROTECT_L_INDEX;
gpios->gpios[count].polarity = ACTIVE_LOW;
- gpios->gpios[count].value = gpio_get_in_value(GPIO(R1));
+ gpios->gpios[count].value = gpio_get_in_value(WRITE_PROTECT_L);
strncpy((char *)gpios->gpios[count].name, "write protect",
GPIO_MAX_NAME_LENGTH);
count++;
@@ -48,7 +48,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
/* TODO(adurbin): add lid switch */
/* Power: active low */
- gpios->gpios[count].port = GPIO_Q0_INDEX;
+ gpios->gpios[count].port = POWER_BUTTON_L_INDEX,
gpios->gpios[count].polarity = ACTIVE_LOW;
gpios->gpios[count].value = 1;
strncpy((char *)gpios->gpios[count].name, "power",
@@ -85,5 +85,5 @@ int get_recovery_mode_switch(void)
int get_write_protect_state(void)
{
- return !gpio_get_in_value(GPIO(R1));
+ return !gpio_get_in_value(WRITE_PROTECT_L);
}
diff --git a/src/mainboard/google/rush_ryu/gpio.h b/src/mainboard/google/rush_ryu/gpio.h
index 9b51a58116..e248540a40 100644
--- a/src/mainboard/google/rush_ryu/gpio.h
+++ b/src/mainboard/google/rush_ryu/gpio.h
@@ -40,6 +40,16 @@ enum {
MODEM_RESET = GPIO(S3),
MODEM_PWR_ON = GPIO(S4),
MDM_DET = GPIO(V1),
+ /* Warm reset */
+ AP_SYS_RESET_L = GPIO(I5),
+ /* Write Protect */
+ SPI_1V8_WP_L = GPIO(R1),
+ WRITE_PROTECT_L = SPI_1V8_WP_L,
+ WRITE_PROTECT_L_INDEX = GPIO_R1_INDEX,
+ /* Power Button */
+ BTN_AP_PWR_L = GPIO(Q0),
+ POWER_BUTTON_L = BTN_AP_PWR_L,
+ POWER_BUTTON_L_INDEX = GPIO_Q0_INDEX,
};
#endif /* __MAINBOARD_GOOGLE_RUSH_RYU_GPIO_H__ */
diff --git a/src/mainboard/google/rush_ryu/reset.c b/src/mainboard/google/rush_ryu/reset.c
index f3057cac90..4548837d7e 100644
--- a/src/mainboard/google/rush_ryu/reset.c
+++ b/src/mainboard/google/rush_ryu/reset.c
@@ -19,10 +19,10 @@
#include <arch/io.h>
#include <reset.h>
-#include <soc/nvidia/tegra132/gpio.h>
+#include "gpio.h"
void hard_reset(void)
{
- gpio_output(GPIO(I5), 0);
+ gpio_output(AP_SYS_RESET_L, 0);
while(1);
}