summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--src/mainboard/apple/macbook21/Makefile.inc2
-rw-r--r--src/mainboard/apple/macbook21/cstates.c38
-rw-r--r--src/mainboard/apple/macbook21/mainboard.c36
-rw-r--r--src/mainboard/asus/p5ql-em/Makefile.inc2
-rw-r--r--src/mainboard/asus/p5ql-em/acpi_tables.c7
-rw-r--r--src/mainboard/asus/p5ql-em/cstates.c9
-rw-r--r--src/mainboard/lenovo/t60/Makefile.inc1
-rw-r--r--src/mainboard/lenovo/t60/cstates.c16
-rw-r--r--src/mainboard/lenovo/t60/mainboard.c12
-rw-r--r--src/mainboard/lenovo/x60/Makefile.inc1
-rw-r--r--src/mainboard/lenovo/x60/cstates.c41
-rw-r--r--src/mainboard/lenovo/x60/mainboard.c37
12 files changed, 110 insertions, 92 deletions
diff --git a/src/mainboard/apple/macbook21/Makefile.inc b/src/mainboard/apple/macbook21/Makefile.inc
index b4f8b6573a..58198971cd 100644
--- a/src/mainboard/apple/macbook21/Makefile.inc
+++ b/src/mainboard/apple/macbook21/Makefile.inc
@@ -1,3 +1,5 @@
romstage-y += gpio.c
bootblock-y += early_init.c
romstage-y += early_init.c
+
+ramstage-y += cstates.c
diff --git a/src/mainboard/apple/macbook21/cstates.c b/src/mainboard/apple/macbook21/cstates.c
new file mode 100644
index 0000000000..8f295040f7
--- /dev/null
+++ b/src/mainboard/apple/macbook21/cstates.c
@@ -0,0 +1,38 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpigen.h>
+
+static acpi_cstate_t cst_entries[] = {
+ {
+ .ctype = 1,
+ .latency = 1,
+ .power = 1000,
+ .resource = {
+ .space_id = ACPI_ADDRESS_SPACE_FIXED,
+ .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
+ .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
+ .access_size = ACPI_ACCESS_SIZE_UNDEFINED,
+ .addrl = 0,
+ .addrh = 0,
+ }
+ },
+ {
+ .ctype = 2,
+ .latency = 1,
+ .power = 500,
+ .resource = {
+ .space_id = ACPI_ADDRESS_SPACE_FIXED,
+ .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
+ .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
+ .access_size = ACPI_ACCESS_SIZE_UNDEFINED,
+ .addrl = 0x10,
+ .addrh = 0,
+ }
+ },
+};
+
+int get_cst_entries(acpi_cstate_t **entries)
+{
+ *entries = cst_entries;
+ return ARRAY_SIZE(cst_entries);
+}
diff --git a/src/mainboard/apple/macbook21/mainboard.c b/src/mainboard/apple/macbook21/mainboard.c
index 447837ba54..27d0363e4f 100644
--- a/src/mainboard/apple/macbook21/mainboard.c
+++ b/src/mainboard/apple/macbook21/mainboard.c
@@ -2,47 +2,11 @@
#include <device/device.h>
#include <northbridge/intel/i945/i945.h>
-#include <acpi/acpigen.h>
#include <drivers/intel/gma/int15.h>
#include <ec/acpi/ec.h>
#define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
-static acpi_cstate_t cst_entries[] = {
- {
- .ctype = 1,
- .latency = 1,
- .power = 1000,
- .resource = {
- .space_id = ACPI_ADDRESS_SPACE_FIXED,
- .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
- .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
- .access_size = ACPI_ACCESS_SIZE_UNDEFINED,
- .addrl = 0,
- .addrh = 0,
- }
- },
- {
- .ctype = 2,
- .latency = 1,
- .power = 500,
- .resource = {
- .space_id = ACPI_ADDRESS_SPACE_FIXED,
- .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
- .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
- .access_size = ACPI_ACCESS_SIZE_UNDEFINED,
- .addrl = 0x10,
- .addrh = 0,
- }
- },
-};
-
-int get_cst_entries(acpi_cstate_t **entries)
-{
- *entries = cst_entries;
- return ARRAY_SIZE(cst_entries);
-}
-
static void mainboard_init(struct device *dev)
{
install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS, GMA_INT15_PANEL_FIT_DEFAULT, PANEL, 3);
diff --git a/src/mainboard/asus/p5ql-em/Makefile.inc b/src/mainboard/asus/p5ql-em/Makefile.inc
index 097c9f9aa9..4a5e88d022 100644
--- a/src/mainboard/asus/p5ql-em/Makefile.inc
+++ b/src/mainboard/asus/p5ql-em/Makefile.inc
@@ -5,4 +5,6 @@ bootblock-y += early_init.c
romstage-y += gpio.c
romstage-y += early_init.c
+ramstage-y += cstates.c
+
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
diff --git a/src/mainboard/asus/p5ql-em/acpi_tables.c b/src/mainboard/asus/p5ql-em/acpi_tables.c
index dcc7849708..1e75ed6f2a 100644
--- a/src/mainboard/asus/p5ql-em/acpi_tables.c
+++ b/src/mainboard/asus/p5ql-em/acpi_tables.c
@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <acpi/acpigen.h>
#include <acpi/acpi_gnvs.h>
#include <soc/nvs.h>
@@ -12,9 +11,3 @@ void mainboard_fill_gnvs(struct global_nvs *gnvs)
gnvs->mpen = 1; /* Enable Multi Processing */
gnvs->cmap = 0x01; /* Enable COM 1 port */
}
-
-/* TODO: Could work... */
-int get_cst_entries(acpi_cstate_t **entries)
-{
- return 0;
-}
diff --git a/src/mainboard/asus/p5ql-em/cstates.c b/src/mainboard/asus/p5ql-em/cstates.c
new file mode 100644
index 0000000000..791f78e38d
--- /dev/null
+++ b/src/mainboard/asus/p5ql-em/cstates.c
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpigen.h>
+
+/* TODO: Could work... */
+int get_cst_entries(acpi_cstate_t **entries)
+{
+ return 0;
+}
diff --git a/src/mainboard/lenovo/t60/Makefile.inc b/src/mainboard/lenovo/t60/Makefile.inc
index 5ded71b41a..000367bc30 100644
--- a/src/mainboard/lenovo/t60/Makefile.inc
+++ b/src/mainboard/lenovo/t60/Makefile.inc
@@ -7,3 +7,4 @@ bootblock-y += gpio.c
romstage-y += gpio.c
bootblock-y += early_init.c
romstage-y += early_init.c
+ramstage-y += cstates.c
diff --git a/src/mainboard/lenovo/t60/cstates.c b/src/mainboard/lenovo/t60/cstates.c
new file mode 100644
index 0000000000..7a1e4d6001
--- /dev/null
+++ b/src/mainboard/lenovo/t60/cstates.c
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpigen.h>
+#include <southbridge/intel/i82801gx/i82801gx.h>
+
+static acpi_cstate_t cst_entries[] = {
+ { 1, 1, 1000, { 0x7f, 1, 2, 0, 1, 0 } },
+ { 2, 1, 500, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV2, 0 } },
+ { 3, 17, 250, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV3, 0 } },
+};
+
+int get_cst_entries(acpi_cstate_t **entries)
+{
+ *entries = cst_entries;
+ return ARRAY_SIZE(cst_entries);
+}
diff --git a/src/mainboard/lenovo/t60/mainboard.c b/src/mainboard/lenovo/t60/mainboard.c
index ee5ec8feb8..7ebe25e0af 100644
--- a/src/mainboard/lenovo/t60/mainboard.c
+++ b/src/mainboard/lenovo/t60/mainboard.c
@@ -12,18 +12,6 @@
#define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
-static acpi_cstate_t cst_entries[] = {
- { 1, 1, 1000, { 0x7f, 1, 2, 0, 1, 0 } },
- { 2, 1, 500, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV2, 0 } },
- { 3, 17, 250, { 0x01, 8, 0, 0, DEFAULT_PMBASE + LV3, 0 } },
-};
-
-int get_cst_entries(acpi_cstate_t **entries)
-{
- *entries = cst_entries;
- return ARRAY_SIZE(cst_entries);
-}
-
static void mainboard_init(struct device *dev)
{
struct southbridge_intel_i82801gx_config *config;
diff --git a/src/mainboard/lenovo/x60/Makefile.inc b/src/mainboard/lenovo/x60/Makefile.inc
index 56fa18b13a..7bdd496a5f 100644
--- a/src/mainboard/lenovo/x60/Makefile.inc
+++ b/src/mainboard/lenovo/x60/Makefile.inc
@@ -8,3 +8,4 @@ bootblock-y += gpio.c
romstage-y += gpio.c
bootblock-y += early_init.c
romstage-y += early_init.c
+ramstage-y += cstates.c
diff --git a/src/mainboard/lenovo/x60/cstates.c b/src/mainboard/lenovo/x60/cstates.c
new file mode 100644
index 0000000000..c6237bc592
--- /dev/null
+++ b/src/mainboard/lenovo/x60/cstates.c
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpigen.h>
+#include <southbridge/intel/i82801gx/i82801gx.h>
+
+#define MWAIT_RES(state, sub_state) \
+ { \
+ .space_id = ACPI_ADDRESS_SPACE_FIXED, \
+ .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
+ .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
+ .access_size = ACPI_ACCESS_SIZE_UNDEFINED, \
+ .addrl = (((state) << 4) | (sub_state)), \
+ .addrh = 0, \
+ }
+
+static acpi_cstate_t cst_entries[] = {
+ {
+ .ctype = 1,
+ .latency = 1,
+ .power = 1000,
+ .resource = MWAIT_RES(0, 0),
+ },
+ {
+ .ctype = 2,
+ .latency = 1,
+ .power = 500,
+ .resource = MWAIT_RES(1, 0),
+ },
+ {
+ .ctype = 3,
+ .latency = 17,
+ .power = 250,
+ .resource = MWAIT_RES(2, 0),
+ },
+};
+
+int get_cst_entries(acpi_cstate_t **entries)
+{
+ *entries = cst_entries;
+ return ARRAY_SIZE(cst_entries);
+}
diff --git a/src/mainboard/lenovo/x60/mainboard.c b/src/mainboard/lenovo/x60/mainboard.c
index f6930bb93f..a9946b25d1 100644
--- a/src/mainboard/lenovo/x60/mainboard.c
+++ b/src/mainboard/lenovo/x60/mainboard.c
@@ -15,43 +15,6 @@
#define PANEL INT15_5F35_CL_DISPLAY_DEFAULT
-#define MWAIT_RES(state, sub_state) \
- { \
- .space_id = ACPI_ADDRESS_SPACE_FIXED, \
- .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL, \
- .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT, \
- .access_size = ACPI_ACCESS_SIZE_UNDEFINED, \
- .addrl = (((state) << 4) | (sub_state)), \
- .addrh = 0, \
- }
-
-static acpi_cstate_t cst_entries[] = {
- {
- .ctype = 1,
- .latency = 1,
- .power = 1000,
- .resource = MWAIT_RES(0, 0),
- },
- {
- .ctype = 2,
- .latency = 1,
- .power = 500,
- .resource = MWAIT_RES(1, 0),
- },
- {
- .ctype = 3,
- .latency = 17,
- .power = 250,
- .resource = MWAIT_RES(2, 0),
- },
-};
-
-int get_cst_entries(acpi_cstate_t **entries)
-{
- *entries = cst_entries;
- return ARRAY_SIZE(cst_entries);
-}
-
static void mainboard_init(struct device *dev)
{
struct device *idedev, *sdhci_dev;
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-27 09:43:09 +0000