diff options
| -rw-r--r-- | src/soc/cavium/cn81xx/Kconfig | 5 | ||||
| -rw-r--r-- | src/soc/cavium/cn81xx/Makefile.inc | 15 | ||||
| -rw-r--r-- | src/soc/cavium/cn81xx/include/soc/addressmap.h | 1 | ||||
| -rw-r--r-- | src/soc/cavium/cn81xx/include/soc/memlayout.ld | 6 | ||||
| -rw-r--r-- | src/soc/cavium/cn81xx/reset.c | 23 |
5 files changed, 49 insertions, 1 deletions
diff --git a/src/soc/cavium/cn81xx/Kconfig b/src/soc/cavium/cn81xx/Kconfig index edc94805cc..24d386c6ae 100644 --- a/src/soc/cavium/cn81xx/Kconfig +++ b/src/soc/cavium/cn81xx/Kconfig @@ -17,6 +17,11 @@ config SOC_CAVIUM_CN81XX if SOC_CAVIUM_CN81XX +config VBOOT + select VBOOT_SEPARATE_VERSTAGE + select VBOOT_RETURN_FROM_VERSTAGE + select VBOOT_STARTS_IN_BOOTBLOCK + config ARM64_BL31_EXTERNAL_FILE string default "3rdparty/blobs/soc/cavium/cn81xx/bl31.elf" diff --git a/src/soc/cavium/cn81xx/Makefile.inc b/src/soc/cavium/cn81xx/Makefile.inc index 2179bc7ec8..d212715d80 100644 --- a/src/soc/cavium/cn81xx/Makefile.inc +++ b/src/soc/cavium/cn81xx/Makefile.inc @@ -25,11 +25,24 @@ bootblock-y += timer.c bootblock-y += spi.c bootblock-y += uart.c bootblock-y += cpu.c +bootblock-y += reset.c ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y) bootblock-$(CONFIG_DRIVERS_UART) += uart.c endif ################################################################################ +# verstage + +verstage-y += twsi.c +verstage-y += clock.c +verstage-y += gpio.c +verstage-y += timer.c +verstage-y += spi.c +verstage-$(CONFIG_DRIVERS_UART) += uart.c +verstage-y += cbmem.c +verstage-y += reset.c + +################################################################################ # romstage romstage-y += twsi.c @@ -40,6 +53,7 @@ romstage-y += spi.c romstage-y += uart.c romstage-$(CONFIG_DRIVERS_UART) += uart.c romstage-y += cbmem.c +romstage-y += reset.c romstage-y += sdram.c romstage-y += mmu.c @@ -60,6 +74,7 @@ ramstage-y += cpu.c ramstage-y += cpu_secondary.S ramstage-y += ecam0.c ramstage-y += cbmem.c +ramstage-y += reset.c ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c diff --git a/src/soc/cavium/cn81xx/include/soc/addressmap.h b/src/soc/cavium/cn81xx/include/soc/addressmap.h index f6983064fc..f188961930 100644 --- a/src/soc/cavium/cn81xx/include/soc/addressmap.h +++ b/src/soc/cavium/cn81xx/include/soc/addressmap.h @@ -62,6 +62,7 @@ /* RST */ #define RST_PF_BAR0 (0x87E006000000ULL + 0x1600) +#define RST_SOFT_RESET (RST_PF_BAR0 + 0x80ULL) #define RST_PP_AVAILABLE (RST_PF_BAR0 + 0x138ULL) #define RST_PP_RESET (RST_PF_BAR0 + 0x140ULL) #define RST_PP_PENDING (RST_PF_BAR0 + 0x148ULL) diff --git a/src/soc/cavium/cn81xx/include/soc/memlayout.ld b/src/soc/cavium/cn81xx/include/soc/memlayout.ld index b80d152f97..e3bf61f1f4 100644 --- a/src/soc/cavium/cn81xx/include/soc/memlayout.ld +++ b/src/soc/cavium/cn81xx/include/soc/memlayout.ld @@ -28,14 +28,18 @@ SECTIONS /* Insecure region 1MiB - TOP OF DRAM */ /* bootblock-custom.S does setup CAR from SRAM_START to SRAM_END */ SRAM_START(BOOTROM_OFFSET) + STACK(BOOTROM_OFFSET, 16K) TIMESTAMP(BOOTROM_OFFSET + 0x4000, 4K) PRERAM_CBFS_CACHE(BOOTROM_OFFSET + 0x6000, 8K) PRERAM_CBMEM_CONSOLE(BOOTROM_OFFSET + 0x8000, 8K) - BOOTBLOCK(BOOTROM_OFFSET + 0x20000, 64K) + VBOOT2_WORK(BOOTROM_OFFSET + 0x30000, 12K) + VERSTAGE(BOOTROM_OFFSET + 0x33000, 52K) ROMSTAGE(BOOTROM_OFFSET + 0x40000, 256K) + SRAM_END(BOOTROM_OFFSET + 0x80000) + TTB(BOOTROM_OFFSET + 0x80000, 512K) RAMSTAGE(BOOTROM_OFFSET + 0x100000, 512K) /* Stack for secondary CPUs */ diff --git a/src/soc/cavium/cn81xx/reset.c b/src/soc/cavium/cn81xx/reset.c new file mode 100644 index 0000000000..d3be7c9b5f --- /dev/null +++ b/src/soc/cavium/cn81xx/reset.c @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018-present Facebook, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/io.h> +#include <soc/addressmap.h> +#include <reset.h> + +void do_soft_reset(void) +{ + write64((void *)RST_SOFT_RESET, 1); +} |