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-rw-r--r--src/arch/i386/include/arch/smp/mpspec.h5
-rw-r--r--src/cpu/via/model_centaur/Config.lb9
-rw-r--r--src/cpu/via/model_centaur/model_centaur_init.c56
-rw-r--r--src/cpu/x86/lapic/lapic_cpu_init.c2
-rw-r--r--src/mainboard/via/epia/Config.lb115
-rw-r--r--src/mainboard/via/epia/Options.lb4
-rw-r--r--src/mainboard/via/epia/auto.c8
-rw-r--r--src/mainboard/via/epia/chip.h2
-rw-r--r--src/mainboard/via/epia/failover.c2
-rw-r--r--src/mainboard/via/epia/mainboard.c6
-rw-r--r--src/northbridge/via/vt8601/chip.h2
-rw-r--r--src/northbridge/via/vt8601/northbridge.c8
-rw-r--r--src/northbridge/via/vt8601/raminit.c2
-rw-r--r--src/southbridge/via/vt8231/chip.h2
-rw-r--r--src/southbridge/via/vt8231/vt8231.c42
15 files changed, 162 insertions, 103 deletions
diff --git a/src/arch/i386/include/arch/smp/mpspec.h b/src/arch/i386/include/arch/smp/mpspec.h
index 9f22b7f4af..98c21c5bcc 100644
--- a/src/arch/i386/include/arch/smp/mpspec.h
+++ b/src/arch/i386/include/arch/smp/mpspec.h
@@ -267,11 +267,14 @@ void *smp_write_floating_table(unsigned long addr);
unsigned long write_smp_table(unsigned long addr);
#else /* HAVE_MP_TABLE */
+#if 0
static inline
-unsigned long write_smp_table(unsigned long addr);
+unsigned long write_smp_table(unsigned long addr)
{
return addr;
}
+#endif
+#define write_smp_table(addr) addr
#endif /* HAVE_MP_TABLE */
#endif
diff --git a/src/cpu/via/model_centaur/Config.lb b/src/cpu/via/model_centaur/Config.lb
new file mode 100644
index 0000000000..bd6673360f
--- /dev/null
+++ b/src/cpu/via/model_centaur/Config.lb
@@ -0,0 +1,9 @@
+dir /cpu/x86/tsc
+dir /cpu/x86/mtrr
+dir /cpu/x86/fpu
+dir /cpu/x86/mmx
+dir /cpu/x86/sse
+dir /cpu/x86/lapic
+dir /cpu/x86/cache
+dir /cpu/intel/microcode
+driver model_centaur_init.o
diff --git a/src/cpu/via/model_centaur/model_centaur_init.c b/src/cpu/via/model_centaur/model_centaur_init.c
new file mode 100644
index 0000000000..af2b7464b1
--- /dev/null
+++ b/src/cpu/via/model_centaur/model_centaur_init.c
@@ -0,0 +1,56 @@
+#include <console/console.h>
+#include <device/device.h>
+#include <device/device.h>
+#include <device/pci.h>
+#include <string.h>
+#include <cpu/cpu.h>
+#include <cpu/x86/mtrr.h>
+#include <cpu/x86/msr.h>
+#include <cpu/x86/lapic.h>
+#include <cpu/intel/microcode.h>
+#include <cpu/x86/cache.h>
+#include <cpu/x86/mtrr.h>
+
+static uint32_t microcode_updates[] = {
+ /* WARNING - Intel has a new data structure that has variable length
+ * microcode update lengths. They are encoded in int 8 and 9. A
+ * dummy header of nulls must terminate the list.
+ */
+
+ /* Dummy terminator */
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+ 0x0, 0x0, 0x0, 0x0,
+};
+
+
+static void model_centaur_init(device_t dev)
+{
+ /* Turn on caching if we haven't already */
+ x86_enable_cache();
+ x86_mtrr_check();
+
+ /* Update the microcode */
+ intel_update_microcode(microcode_updates);
+
+ /* Enable the local cpu apics */
+ setup_lapic();
+};
+
+static struct device_operations cpu_dev_ops = {
+ .init = model_centaur_init,
+};
+
+#warning "FIXME - need correct cpu id here for VIA C3"
+static struct cpu_device_id cpu_table[] = {
+ { X86_VENDOR_CENTAUR, 0x0670 }, // VIA C3 Samual 2
+ { X86_VENDOR_CENTAUR, 0x0678 }, // VIA C3 Ezra
+ { X86_VENDOR_CENTAUR, 0x0680 }, // VIA C3 Ezra-T
+ { 0, 0 },
+};
+
+static struct cpu_driver driver __cpu_driver = {
+ .ops = &cpu_dev_ops,
+ .id_table = cpu_table,
+};
diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c
index b96c7b3586..5e7b7934c7 100644
--- a/src/cpu/x86/lapic/lapic_cpu_init.c
+++ b/src/cpu/x86/lapic/lapic_cpu_init.c
@@ -301,7 +301,7 @@ void initialize_cpus(struct bus *cpu_bus)
cpu_path.u.apic.apic_id = lapicid();
#else
/* Get the device path of the boot cpu */
- cpu_path.type = DEVICE_PATH_BOOT_CPU;
+ cpu_path.type = DEVICE_PATH_DEFAULT_CPU;
#endif
/* Find the device structure for the boot cpu */
diff --git a/src/mainboard/via/epia/Config.lb b/src/mainboard/via/epia/Config.lb
index ce6f762985..d8485dff0a 100644
--- a/src/mainboard/via/epia/Config.lb
+++ b/src/mainboard/via/epia/Config.lb
@@ -14,9 +14,8 @@ end
## Compute the start location and size size of
## The linuxBIOS bootloader.
##
-default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
-default CONFIG_ROM_STREAM = 1
+default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
##
## Compute where this copy of linuxBIOS will start in the boot rom
@@ -45,6 +44,7 @@ arch i386 end
driver mainboard.o
+if HAVE_PIRQ_TABLE object irq_tables.o end
#object reset.o
##
@@ -128,59 +128,63 @@ dir /pc80
config chip.h
chip northbridge/via/vt8601
-# pci 0:0.0
-# pci 0:1.0
- chip southbridge/via/vt8231
-# pci 0:11.0
-# pci 0:11.1
-# pci 0:11.2
-# pci 0:11.3
-# pci 0:11.4
-# pci 0:11.5
-# pci 0:11.6
-# pci 0:12.0
- register "enable_usb" = "0"
- register "enable_native_ide" = "0"
- register "enable_com_ports" = "1"
- register "enable_keyboard" = "0"
- register "enable_nvram" = "1"
- chip superio/winbond/w83627hf
- device pnp 2e.0 on # Floppy
- io 0x60 = 0x3f0
- irq 0x70 = 6
- drq 0x74 = 2
- end
- device pnp 2e.1 off # Parallel Port
- io 0x60 = 0x378
- irq 0x70 = 7
- end
- device pnp 2e.2 on # Com1
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.3 off # Com2
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.5 on # Keyboard
- io 0x60 = 0x60
- io 0x62 = 0x64
- irq 0x70 = 1
- irq 0x72 = 12
- end
- device pnp 2e.6 off end # CIR
- device pnp 2e.7 off end # GAME_MIDI_GIPO1
- device pnp 2e.8 off end # GPIO2
- device pnp 2e.9 off end # GPIO3
- device pnp 2e.a off end # ACPI
- device pnp 2e.b on # HW Monitor
- io 0x60 = 0x290
- end
- register "com1" = "{1}"
- # register "com1" = "{1, 0, 0x3f8, 4}"
- # register "lpt" = "{1}"
- end
- end
+ device pci_domain 0 on
+ device pci 0.0 on
+ chip southbridge/via/vt8231
+ register "enable_usb" = "0"
+ register "enable_native_ide" = "0"
+ register "enable_com_ports" = "1"
+ register "enable_keyboard" = "0"
+ register "enable_nvram" = "1"
+ device pci 11.0 on # Southbridge
+ device pci 11.1 on end # Ide
+ device pci 11.2 off end # Usb
+ device pci 11.3 off end # Usb
+ device pci 11.4 off end # ACPI
+ device pci 11.5 off end # Audio
+ device pci 11.6 on # Com
+ chip superio/winbond/w83627hf
+ device pnp 2e.0 on # Floppy
+ io 0x60 = 0x3f0
+ irq 0x70 = 6
+ drq 0x74 = 2
+ end
+ device pnp 2e.1 off # Parallel Port
+ io 0x60 = 0x378
+ irq 0x70 = 7
+ end
+ device pnp 2e.2 on # Com1
+ io 0x60 = 0x3f8
+ irq 0x70 = 4
+ end
+ device pnp 2e.3 off # Com2
+ io 0x60 = 0x2f8
+ irq 0x70 = 3
+ end
+ device pnp 2e.5 on # Keyboard
+ io 0x60 = 0x60
+ io 0x62 = 0x64
+ irq 0x70 = 1
+ irq 0x72 = 12
+ end
+ device pnp 2e.6 off end # CIR
+ device pnp 2e.7 off end # GAME_MIDI_GIPO1
+ device pnp 2e.8 off end # GPIO2
+ device pnp 2e.9 off end # GPIO3
+ device pnp 2e.a off end # ACPI
+ device pnp 2e.b on # HW Monitor
+ io 0x60 = 0x290
+ end
+ register "com1" = "{1}"
+ end
+ end
+ device pci 12.0 on end # Ethernet
+ end
+ end
+ end
+ end
+ chip cpu/via/model_centaur
+ end
end
##
@@ -188,3 +192,4 @@ end
##
mainboardinit pc80/serial.inc
mainboardinit arch/i386/lib/console.inc
+
diff --git a/src/mainboard/via/epia/Options.lb b/src/mainboard/via/epia/Options.lb
index ca0f2fba13..5d5e28fc3e 100644
--- a/src/mainboard/via/epia/Options.lb
+++ b/src/mainboard/via/epia/Options.lb
@@ -68,6 +68,7 @@ default HAVE_OPTION_TABLE=1
## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
default ROM_IMAGE_SIZE = 65536
+default FALLBACK_SIZE = 131072
##
## Use a small 8K stack
@@ -87,4 +88,7 @@ default USE_OPTION_TABLE = 0
default _RAMBASE = 0x00004000
+default CONFIG_ROM_STREAM = 1
+
end
+
diff --git a/src/mainboard/via/epia/auto.c b/src/mainboard/via/epia/auto.c
index 3e40d04e8a..377dc54754 100644
--- a/src/mainboard/via/epia/auto.c
+++ b/src/mainboard/via/epia/auto.c
@@ -2,7 +2,7 @@
#include <stdint.h>
#include <device/pci_def.h>
-#include <cpu/p6/apic.h>
+#include <cpu/x86/lapic.h>
#include <arch/io.h>
#include <device/pnp_def.h>
#include <arch/romcc_io.h>
@@ -11,7 +11,7 @@
#include "arch/i386/lib/console.c"
#include "ram/ramtest.c"
#include "northbridge/via/vt8601/raminit.h"
-#include "cpu/p6/earlymtrr.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
/*
*/
@@ -23,7 +23,7 @@ void udelay(int usecs)
}
#include "lib/delay.c"
-#include "cpu/p6/boot_cpu.c"
+#include "cpu/x86/lapic/boot_cpu.c"
#include "debug.c"
#include "southbridge/via/vt8231/vt8231_early_smbus.c"
@@ -96,8 +96,6 @@ static void enable_shadow_ram(void)
static void main(void)
{
unsigned long x;
- /* init_timer();*/
- outb(5, 0x80);
enable_vt8231_serial();
diff --git a/src/mainboard/via/epia/chip.h b/src/mainboard/via/epia/chip.h
index 2631c0ceed..9e019bd807 100644
--- a/src/mainboard/via/epia/chip.h
+++ b/src/mainboard/via/epia/chip.h
@@ -1,4 +1,4 @@
-extern struct chip_operations mainboard_via_epia_control;
+extern struct chip_operations mainboard_via_epia_ops;
struct mainboard_via_epia_config {
int nothing;
diff --git a/src/mainboard/via/epia/failover.c b/src/mainboard/via/epia/failover.c
index bd0df4e89d..10bb2f48c1 100644
--- a/src/mainboard/via/epia/failover.c
+++ b/src/mainboard/via/epia/failover.c
@@ -5,7 +5,7 @@
#include <arch/io.h>
#include "arch/romcc_io.h"
#include "pc80/mc146818rtc_early.c"
-#include "cpu/p6/boot_cpu.c"
+#include "cpu/x86/lapic/boot_cpu.c"
static void main(void)
{
diff --git a/src/mainboard/via/epia/mainboard.c b/src/mainboard/via/epia/mainboard.c
index 91a81b52e4..bed59cd76e 100644
--- a/src/mainboard/via/epia/mainboard.c
+++ b/src/mainboard/via/epia/mainboard.c
@@ -7,8 +7,8 @@
#include <arch/io.h>
#include "chip.h"
-static int
-mainboard_scan_bus(device_t root, int maxbus)
+static unsigned int
+mainboard_scan_bus(device_t root, unsigned int maxbus)
{
int retval;
printk_spew("%s: root %p maxbus %d\n", __FUNCTION__, root, maxbus);
@@ -31,7 +31,7 @@ static void enable_dev(device_t dev)
dev->ops = &mainboard_operations;
}
-struct chip_operations mainboard_via_epia_control = {
+struct chip_operations mainboard_via_epia_ops = {
.enable_dev = enable_dev,
.name = "VIA EPIA mainboard ",
};
diff --git a/src/northbridge/via/vt8601/chip.h b/src/northbridge/via/vt8601/chip.h
index 29c4e43772..9f61465428 100644
--- a/src/northbridge/via/vt8601/chip.h
+++ b/src/northbridge/via/vt8601/chip.h
@@ -2,4 +2,4 @@ struct northbridge_via_vt8601_config
{
};
-extern struct chip_operations northbridge_via_vt8601_control;
+extern struct chip_operations northbridge_via_vt8601_ops;
diff --git a/src/northbridge/via/vt8601/northbridge.c b/src/northbridge/via/vt8601/northbridge.c
index fd6b6eb916..956a485cf4 100644
--- a/src/northbridge/via/vt8601/northbridge.c
+++ b/src/northbridge/via/vt8601/northbridge.c
@@ -3,6 +3,7 @@
#include <stdint.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_ids.h>
#include <device/hypertransport.h>
#include <stdlib.h>
#include <string.h>
@@ -52,7 +53,6 @@ static struct pci_driver northbridge_driver __pci_driver = {
static void pci_domain_read_resources(device_t dev)
{
struct resource *resource;
- unsigned reg;
/* Initialize the system wide io space constraints */
resource = new_resource(dev, 0);
@@ -133,7 +133,7 @@ static void pci_domain_set_resources(device_t dev)
ramregs[i]);
}
printk_debug("I would set ram size to 0x%x Kbytes\n", (rambits)*8*1024);
- tomk = ramreg*8*1024;
+ tomk = rambits*8*1024;
/* Compute the top of Low memory */
tolmk = pci_tolm >> 10;
if (tolmk >= tomk) {
@@ -181,8 +181,6 @@ static struct device_operations cpu_bus_ops = {
static void enable_dev(struct device *dev)
{
- struct device_path path;
-
/* Set the operations if it is a special bus type */
if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
dev->ops = &pci_domain_ops;
@@ -192,7 +190,7 @@ static void enable_dev(struct device *dev)
}
}
-struct chip_operations northbridge_via_vt8601_control = {
+struct chip_operations northbridge_via_vt8601_ops = {
.enable_dev = enable_dev,
.name = "VIA vt8601 Northbridge",
};
diff --git a/src/northbridge/via/vt8601/raminit.c b/src/northbridge/via/vt8601/raminit.c
index b823d57df4..42cac0f088 100644
--- a/src/northbridge/via/vt8601/raminit.c
+++ b/src/northbridge/via/vt8601/raminit.c
@@ -1,4 +1,4 @@
-#include <cpu/p6/mtrr.h>
+#include <cpu/x86/mtrr.h>
#include "raminit.h"
/*
diff --git a/src/southbridge/via/vt8231/chip.h b/src/southbridge/via/vt8231/chip.h
index 28c3b2ef74..bc1e445f26 100644
--- a/src/southbridge/via/vt8231/chip.h
+++ b/src/southbridge/via/vt8231/chip.h
@@ -1,7 +1,7 @@
#ifndef _SOUTHBRIDGE_VIA_VT8231
#define _SOUTHBRIDGE_VIA_VT8231
-extern struct chip_operations southbridge_via_vt8231_control;
+extern struct chip_operations southbridge_via_vt8231_ops;
struct southbridge_via_vt8231_config {
/* PCI function enables */
diff --git a/src/southbridge/via/vt8231/vt8231.c b/src/southbridge/via/vt8231/vt8231.c
index 27d635d38f..082b64e0f3 100644
--- a/src/southbridge/via/vt8231/vt8231.c
+++ b/src/southbridge/via/vt8231/vt8231.c
@@ -161,11 +161,9 @@ static const unsigned char slotIrqs[4] = { 5, 10, 12, 11 };
PCI slot is AD31 (device 15) (00:14.0)
Southbridge is AD28 (device 12) (00:11.0)
*/
-static void pci_routing_fixup(void)
+static void pci_routing_fixup(struct device *dev)
{
- device_t dev;
- dev = dev_find_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, 0);
printk_info("%s: dev is %p\n", __FUNCTION__, dev);
if (dev) {
/* initialize PCI interupts - these assignments depend
@@ -423,33 +421,21 @@ static void vt8231_init(struct southbridge_via_vt8231_config *conf)
rtc_init(0);
}
-static void southbridge_init(struct chip *chip, enum chip_pass pass)
-{
+static void southbridge_init(struct device *dev) {
+ vt8231_init(dev->chip_info);
+ pci_routing_fixup(dev);
+}
- struct southbridge_via_vt8231_config *conf =
- (struct southbridge_via_vt8231_config *)chip->chip_info;
+struct device_operations vt8231_dev_ops = {
+ .init = &southbridge_init,
+};
- switch (pass) {
- case CONF_PASS_PRE_PCI:
- vt8231_pci_enable(conf);
- break;
-
- case CONF_PASS_POST_PCI:
- vt8231_init(conf);
- pci_routing_fixup();
- break;
-
- case CONF_PASS_PRE_BOOT:
- dump_south();
- break;
-
- default:
- /* nothing yet */
- break;
- }
+static void southbridge_enable(struct device *dev)
+{
+ dev->ops = &vt8231_dev_ops;
}
-struct chip_operations southbridge_via_vt8231_control = {
- .enable = southbridge_init,
- .name = "VIA vt8231"
+struct chip_operations southbridge_via_vt8231_ops = {
+ .enable_dev = southbridge_enable,
+ .name = "VIA vt8231"
};
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-28 15:26:15 +0000