diff options
| -rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 6 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/pmutil.c | 11 |
2 files changed, 14 insertions, 3 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 1652bbc56f..3ae6b4aa07 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -604,4 +604,10 @@ void i2c_soc_early_init(void); /* Initialize all the i2c buses that are not marked with early init. */ void i2c_soc_init(void); +/* + * If a system reset is about to be requested, modify the PM1 register so it + * will never be misinterpreted as an S3 resume. + */ +void set_pm1cnt_s5(void); + #endif /* __STONEYRIDGE_H__ */ diff --git a/src/soc/amd/stoneyridge/pmutil.c b/src/soc/amd/stoneyridge/pmutil.c index d2b3ac7bed..bfb5f424ef 100644 --- a/src/soc/amd/stoneyridge/pmutil.c +++ b/src/soc/amd/stoneyridge/pmutil.c @@ -34,9 +34,9 @@ int vboot_platform_is_resuming(void) return acpi_sleep_from_pm1(pm_cnt) == ACPI_S3; } -/* If vboot requests a system reset, modify the PM1 register so it will never be - * misinterpreted as an S3 resume. */ -void vboot_platform_prepare_reboot(void) +/* If a system reset is about to be requested, modify the PM1 register so it + * will never be misinterpreted as an S3 resume. */ +void set_pm1cnt_s5(void) { uint16_t pm1; @@ -45,3 +45,8 @@ void vboot_platform_prepare_reboot(void) pm1 |= SLP_TYP_S5 << SLP_TYP_SHIFT; acpi_write16(MMIO_ACPI_PM1_CNT_BLK, pm1); } + +void vboot_platform_prepare_reboot(void) +{ + set_pm1cnt_s5(); +} |