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-rw-r--r--src/mainboard/amd/inagua/Kconfig43
-rwxr-xr-xsrc/mainboard/amd/inagua/Makefile.inc4
-rw-r--r--src/mainboard/amd/inagua/dimmSpd.c14
-rwxr-xr-xsrc/mainboard/amd/inagua/dimmSpd.h63
-rw-r--r--src/mainboard/amd/inagua/platform_cfg.h2
5 files changed, 106 insertions, 20 deletions
diff --git a/src/mainboard/amd/inagua/Kconfig b/src/mainboard/amd/inagua/Kconfig
index b49494302e..80bc621207 100644
--- a/src/mainboard/amd/inagua/Kconfig
+++ b/src/mainboard/amd/inagua/Kconfig
@@ -123,17 +123,44 @@ config SIO_PORT
default 0x2e
config DRIVERS_PS2_KEYBOARD
- bool
- default y
+ bool
+ default y
config WARNINGS_ARE_ERRORS
- bool
- default n
+ bool
+ default n
+
+config ONBOARD_VGA_IS_PRIMARY
+ bool
+ default y
+
+config VGA_BIOS
+ bool
+ default n
+
+#config VGA_BIOS_FILE
+# string "VGA BIOS path and filename"
+# depends on VGA_BIOS
+# default "rom/video/OntarioGenericVBios.bin"
+
+config VGA_BIOS_ID
+ string "VGA device PCI IDs"
+ depends on VGA_BIOS
+ default "1002,9802"
+
+config AHCI_ROM
+ bool
+ default n
+
+#config AHCI_ROM_FILE
+# string "AHCI ROM path and filename"
+# depends on AHCI_ROM
+# default "rom/ahci/sb800.bin"
-config FALLBACK_VGA_BIOS_ID
- string "VGA device PCI IDs"
- depends on VGA_BIOS
- default "1002,9802"
+config AHCI_ROM_ID
+ string "AHCI device PCI IDs"
+ depends on AHCI_ROM
+ default "1002,4391"
endif # BOARD_AMD_INAGUA
diff --git a/src/mainboard/amd/inagua/Makefile.inc b/src/mainboard/amd/inagua/Makefile.inc
index 955ed806e6..531a736904 100755
--- a/src/mainboard/amd/inagua/Makefile.inc
+++ b/src/mainboard/amd/inagua/Makefile.inc
@@ -31,6 +31,4 @@ ramstage-y += PlatformGnbPcie.c
ramstage-y += reset.c
-AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
-subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY14) += ../../../../$(AGESA_ROOT)
-#subdirs-$(CONFIG_AMD_SB_CIMX) += ../../../vendorcode/amd/cimx
+subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY14) += $(src)/vendorcode/amd/agesa/f14 \ No newline at end of file
diff --git a/src/mainboard/amd/inagua/dimmSpd.c b/src/mainboard/amd/inagua/dimmSpd.c
index 94e63e1bda..d6bf5b28e1 100644
--- a/src/mainboard/amd/inagua/dimmSpd.c
+++ b/src/mainboard/amd/inagua/dimmSpd.c
@@ -30,17 +30,13 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
* SPD address table - porting required
*/
-static const UINT8 spdAddressLookup [2] [2] [4] = // socket, channel, dimm
+#define SMBUS_BASE_ADDR 0xB00
+static const UINT8 spdAddressLookup [1] [2] [1] = // socket, channel, dimm
{
// socket 0
{
- {0xA0, 0xA2}, // channel 0 dimms
- {0xA4, 0xA8}, // channel 1 dimms
- },
- // socket 1
- {
- {0x00, 0x00}, // channel 0 dimms
- {0x00, 0x00}, // channel 1 dimms
+ {0xA0}, // channel 0 dimms
+ {0xA2}, // channel 1 dimms
},
};
@@ -160,7 +156,7 @@ AGESA_STATUS AmdMemoryReadSPD (UINT32 unused1, UINT32 unused2, AGESA_READ_SPD_PA
spdAddress = spdAddressLookup [info->SocketId] [info->MemChannelId] [info->DimmId];
if (spdAddress == 0) return AGESA_ERROR;
- ioBase = 0xB00;
+ ioBase = SMBUS_BASE_ADDR;
setupFch (ioBase);
return readspd (ioBase, spdAddress, (void *) info->Buffer, 128);
}
diff --git a/src/mainboard/amd/inagua/dimmSpd.h b/src/mainboard/amd/inagua/dimmSpd.h
new file mode 100755
index 0000000000..069c34a6fc
--- /dev/null
+++ b/src/mainboard/amd/inagua/dimmSpd.h
@@ -0,0 +1,63 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2011 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+/*----------------------------------------------------------------------------------------
+ * M O D U L E S U S E D
+ *----------------------------------------------------------------------------------------
+ */
+
+#ifndef _DIMMSPD_H_
+#define _DIMMSPD_H_
+
+#include "Porting.h"
+#include "AGESA.h"
+
+/*----------------------------------------------------------------------------------------
+ * D E F I N I T I O N S A N D M A C R O S
+ *----------------------------------------------------------------------------------------
+ */
+
+/*----------------------------------------------------------------------------------------
+ * T Y P E D E F S A N D S T R U C T U R E S
+ *----------------------------------------------------------------------------------------
+ */
+
+/*----------------------------------------------------------------------------------------
+ * P R O T O T Y P E S O F L O C A L F U N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+
+/*----------------------------------------------------------------------------------------
+ * E X P O R T E D F U N C T I O N S
+ *----------------------------------------------------------------------------------------
+ */
+
+AGESA_STATUS
+AmdMemoryReadSPD (
+ IN UINT32 Func,
+ IN UINT32 Data,
+ IN OUT AGESA_READ_SPD_PARAMS *SpdData
+ );
+
+/*---------------------------------------------------------------------------------------
+ * L O C A L F U N C T I O N S
+ *---------------------------------------------------------------------------------------
+ */
+
+#endif
diff --git a/src/mainboard/amd/inagua/platform_cfg.h b/src/mainboard/amd/inagua/platform_cfg.h
index d37c7e63c8..4a3f080d67 100644
--- a/src/mainboard/amd/inagua/platform_cfg.h
+++ b/src/mainboard/amd/inagua/platform_cfg.h
@@ -36,6 +36,7 @@
* bigger than 1M you have to set the ROM size outside CIMx module and
* before AGESA module get call.
*/
+#ifndef BIOS_SIZE
#if CONFIG_COREBOOT_ROMSIZE_KB_1024 == 1
#define BIOS_SIZE BIOS_SIZE_1M
#elif CONFIG_COREBOOT_ROMSIZE_KB_2048 == 1
@@ -45,6 +46,7 @@
#elif CONFIG_COREBOOT_ROMSIZE_KB_8192 == 1
#define BIOS_SIZE BIOS_SIZE_8M
#endif
+#endif
/**
* @def SPREAD_SPECTRUM