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-rw-r--r--src/soc/intel/broadwell/Kconfig1
-rw-r--r--src/soc/intel/broadwell/pcie.c7
2 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig
index c14766343d..2e70f45eea 100644
--- a/src/soc/intel/broadwell/Kconfig
+++ b/src/soc/intel/broadwell/Kconfig
@@ -36,6 +36,7 @@ config CPU_SPECIFIC_OPTIONS
select PCIEXP_ASPM
select PCIEXP_COMMON_CLOCK
select PCIEXP_CLK_PM
+ select PCIEXP_L1_SUB_STATE
select SMM_MODULES
select SMM_TSEG
select SMP
diff --git a/src/soc/intel/broadwell/pcie.c b/src/soc/intel/broadwell/pcie.c
index fe22bccf63..4e5bbfa015 100644
--- a/src/soc/intel/broadwell/pcie.c
+++ b/src/soc/intel/broadwell/pcie.c
@@ -651,8 +651,15 @@ static void pcie_set_subsystem(device_t dev, unsigned vendor, unsigned device)
pci_write_config32(dev, 0x94, (device << 16) | vendor);
}
+static void pcie_set_L1_ss_max_latency(device_t dev, unsigned int off)
+{
+ /* Set max snoop and non-snoop latency for Broadwell */
+ pci_mmio_write_config32(dev, off, 0x10031003);
+}
+
static struct pci_operations pcie_ops = {
.set_subsystem = pcie_set_subsystem,
+ .set_L1_ss_latency = pcie_set_L1_ss_max_latency,
};
static struct device_operations device_ops = {