aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/arch/x86/include/arch/io.h2
-rw-r--r--src/include/device/pci_mmio_cfg.h (renamed from src/arch/x86/include/arch/pci_mmio_cfg.h)2
2 files changed, 3 insertions, 1 deletions
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index 4b4a178110..a2ba776f81 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -208,7 +208,7 @@ static __always_inline void write64(volatile void *addr,
#define PNP_DEV(PORT, FUNC) (((PORT) << 8) | (FUNC))
#include <arch/pci_io_cfg.h>
-#include <arch/pci_mmio_cfg.h>
+#include <device/pci_mmio_cfg.h>
static __always_inline
uint8_t pci_read_config8(pci_devfn_t dev, unsigned int where)
diff --git a/src/arch/x86/include/arch/pci_mmio_cfg.h b/src/include/device/pci_mmio_cfg.h
index c660ed5332..2e2c19af48 100644
--- a/src/arch/x86/include/arch/pci_mmio_cfg.h
+++ b/src/include/device/pci_mmio_cfg.h
@@ -16,7 +16,9 @@
#ifndef _PCI_MMIO_CFG_H
#define _PCI_MMIO_CFG_H
+#include <stdint.h>
#include <arch/io.h>
+#include <device/pci_type.h>
#define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS