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-rw-r--r--src/cpu/amd/microcode/Makefile.inc2
-rw-r--r--src/cpu/amd/model_10xxx/Kconfig32
-rw-r--r--src/cpu/amd/model_10xxx/Makefile.inc2
-rw-r--r--src/include/cpu/amd/microcode.h6
4 files changed, 3 insertions, 39 deletions
diff --git a/src/cpu/amd/microcode/Makefile.inc b/src/cpu/amd/microcode/Makefile.inc
index 48f1d0d136..f409d1f158 100644
--- a/src/cpu/amd/microcode/Makefile.inc
+++ b/src/cpu/amd/microcode/Makefile.inc
@@ -1,2 +1,2 @@
ramstage-y += microcode.c
-romstage-$(CONFIG_UPDATE_CPU_MICROCODE) += microcode.c
+romstage-y += microcode.c
diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig
index cf5748c354..09c7ec7bd8 100644
--- a/src/cpu/amd/model_10xxx/Kconfig
+++ b/src/cpu/amd/model_10xxx/Kconfig
@@ -70,36 +70,4 @@ config UDELAY_LAPIC_FIXED_FSB
int
default 200
-config UPDATE_CPU_MICROCODE
- bool
- default y
-
-config UPDATE_CPU_MICROCODE
- bool "Update CPU microcode"
- default y
- depends on EXPERT && CPU_AMD_MODEL_10XXX
- help
- Select this to apply patches to the CPU microcode provided by
- AMD without source, and distributed with coreboot, to address
- issues in the CPU post production.
-
- Microcode updates distributed with coreboot are not necessarily
- the latest version available from AMD. Updates are only applied
- if they are newer than the microcode already in your CPU.
-
- Unselect this to let Fam10h CPUs run with microcode as shipped
- from factory. No binary microcode patches will be included in the
- coreboot image in that case, which can help with creating an image
- for which complete source code is available, which in turn might
- simplify license compliance.
-
- Microcode updates intend to solve issues that have been discovered
- after CPU production. The common case is that systems work as
- intended with updated microcode, but we have also seen cases where
- issues were solved by not applying the microcode updates.
-
- Note that some operating system include these same microcode
- patches, so you may need to also disable microcode updates in
- your operating system in order for this option to matter.
-
endif # CPU_AMD_MODEL_10XXX
diff --git a/src/cpu/amd/model_10xxx/Makefile.inc b/src/cpu/amd/model_10xxx/Makefile.inc
index 5cfcc97937..2f04762058 100644
--- a/src/cpu/amd/model_10xxx/Makefile.inc
+++ b/src/cpu/amd/model_10xxx/Makefile.inc
@@ -2,5 +2,5 @@ romstage-y += ../../x86/mtrr/earlymtrr.c
ramstage-y += model_10xxx_init.c
ramstage-y += processor_name.c
-romstage-$(CONFIG_UPDATE_CPU_MICROCODE) += update_microcode.c
+romstage-y += update_microcode.c
ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c
diff --git a/src/include/cpu/amd/microcode.h b/src/include/cpu/amd/microcode.h
index e6d686c36a..3485b6f023 100644
--- a/src/include/cpu/amd/microcode.h
+++ b/src/include/cpu/amd/microcode.h
@@ -3,11 +3,7 @@
void amd_update_microcode(void *microcode_updates, unsigned processor_rev_id);
void model_fxx_update_microcode(unsigned cpu_deviceid);
-
-#if CONFIG_UPDATE_CPU_MICROCODE
void update_microcode(u32 processor_rev_id);
-#else
-#define update_microcode(x)
-#endif
+
#endif /* CPU_AMD_MICROCODE_H */