diff options
| -rw-r--r-- | src/cpu/amd/car/copy_and_run.c | 11 | ||||
| -rw-r--r-- | src/cpu/x86/car/copy_and_run.c | 4 | ||||
| -rw-r--r-- | src/northbridge/amd/amdk8/get_sblk_pci1234.c | 2 |
3 files changed, 9 insertions, 8 deletions
diff --git a/src/cpu/amd/car/copy_and_run.c b/src/cpu/amd/car/copy_and_run.c index e692853385..80fc84072b 100644 --- a/src/cpu/amd/car/copy_and_run.c +++ b/src/cpu/amd/car/copy_and_run.c @@ -23,9 +23,9 @@ static void copy_and_run(void) uint8_t *src, *dst; unsigned long ilen, olen; - print_debug("Copying coreboot to RAM.\r\n"); #if !CONFIG_COMPRESS + print_debug("Copying coreboot to RAM.\r\n"); __asm__ volatile ( "leal _liseg, %0\n\t" "leal _iseg, %1\n\t" @@ -35,6 +35,7 @@ static void copy_and_run(void) ); memcpy(dst, src, olen); #else + print_debug("Uncompressing coreboot to RAM.\r\n"); __asm__ volatile ( "leal _liseg, %0\n\t" @@ -48,12 +49,12 @@ static void copy_and_run(void) // dump_mem(src, src+0x100); olen = unrv2b(src, dst, &ilen); - print_debug_cp_run("linxbios_ram.nrv2b length = ", ilen); + print_debug_cp_run("coreboot_ram.nrv2b length = ", ilen); #endif // dump_mem(dst, dst+0x100); - print_debug_cp_run("linxbios_ram.bin length = ", olen); + print_debug_cp_run("coreboot_ram.bin length = ", olen); print_debug("Jumping to coreboot.\r\n"); @@ -98,12 +99,12 @@ static void copy_and_run_ap_code_in_car(unsigned ret_addr) // dump_mem(src, src+0x100); olen = unrv2b(src, dst, &ilen); -// print_debug_cp_run("linxbios_apc.nrv2b length = ", ilen); +// print_debug_cp_run("coreboot_apc.nrv2b length = ", ilen); #endif // dump_mem(dst, dst+0x100); -// print_debug_cp_run("linxbios_apc.bin length = ", olen); +// print_debug_cp_run("coreboot_apc.bin length = ", olen); // print_debug("Jumping to coreboot AP code in CAR.\r\n"); diff --git a/src/cpu/x86/car/copy_and_run.c b/src/cpu/x86/car/copy_and_run.c index d237f20eea..ac2b7b0ca7 100644 --- a/src/cpu/x86/car/copy_and_run.c +++ b/src/cpu/x86/car/copy_and_run.c @@ -52,9 +52,9 @@ static void copy_and_run(unsigned cpu_reset) #endif // dump_mem(dst, dst+0x100); #if CONFIG_USE_INIT - printk_spew("linxbios_ram.bin length = %08x\r\n", olen); + printk_spew("coreboot_ram.bin length = %08x\r\n", olen); #else - print_spew("linxbios_ram.bin length = "); print_spew_hex32(olen); print_spew("\r\n"); + print_spew("coreboot_ram.bin length = "); print_spew_hex32(olen); print_spew("\r\n"); #endif print_debug("Jumping to coreboot.\r\n"); diff --git a/src/northbridge/amd/amdk8/get_sblk_pci1234.c b/src/northbridge/amd/amdk8/get_sblk_pci1234.c index fbc08ea18a..7b9b757e61 100644 --- a/src/northbridge/amd/amdk8/get_sblk_pci1234.c +++ b/src/northbridge/amd/amdk8/get_sblk_pci1234.c @@ -92,7 +92,7 @@ unsigned node_link_to_bus(unsigned node, unsigned link) * pci1234[0] will record the south bridge link and bus range * pci1234[i] will record HT chain i. * - * For example, on the Tyan S2885 linxbios_ram will put the AMD8151 chain (HT + * For example, on the Tyan S2885 coreboot_ram will put the AMD8151 chain (HT * link 0) into the register 0xE0, and the AMD8131/8111 HT chain into the * register 0xE4. * |