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-rw-r--r--src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/gpio.c48
1 files changed, 24 insertions, 24 deletions
diff --git a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/gpio.c b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/gpio.c
index 335171e446..0b658acbf8 100644
--- a/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/gpio.c
+++ b/src/mainboard/supermicro/x11-lga1151-series/variants/x11ssm-f/gpio.c
@@ -46,26 +46,26 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPO_GPIO_DRIVER(GPP_B11, 0, DEEP, NONE),
PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
- PAD_CFG_NF(GPP_B14, NONE, PLTRST, NF1),
+ PAD_CFG_NF(GPP_B14, NONE, PLTRST, NF1), /* SPKR + JBR1 ("Top-Block Swap") */
PAD_NC(GPP_B15, NONE),
PAD_NC(GPP_B16, NONE),
PAD_NC(GPP_B17, NONE),
PAD_NC(GPP_B18, NONE),
PAD_NC(GPP_B19, NONE),
- PAD_CFG_GPO_GPIO_DRIVER(GPP_B20, 1, PLTRST, NONE),
+ PAD_CFG_GPO(GPP_B20, 0, PLTRST), /* BMC POST_COMPLETE */
PAD_NC(GPP_B21, NONE),
PAD_NC(GPP_B22, NONE),
PAD_CFG_NF(GPP_B23, NONE, DEEP, NF2),
/* GPIO Group GPP_C */
- // PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
- // PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
+ /* GPP_C0 - RESERVED */
+ /* GPP_C1 - RESERVED */
PAD_NC(GPP_C2, NONE),
- // PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
- // PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
+ /* GPP_C3 - RESERVED */
+ /* GPP_C4 - RESERVED */
PAD_CFG_GPO_GPIO_DRIVER(GPP_C5, 1, DEEP, NONE),
- // PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1),
- // PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1),
+ /* GPP_C6 - RESERVED */
+ /* GPP_C7 - RESERVED */
PAD_CFG_GPI_INT(GPP_C8, NONE, PLTRST, OFF),
PAD_CFG_GPI_INT(GPP_C9, NONE, PLTRST, OFF),
PAD_CFG_GPI_INT(GPP_C10, NONE, PLTRST, OFF),
@@ -78,14 +78,14 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_C17, NONE),
PAD_NC(GPP_C18, NONE),
PAD_NC(GPP_C19, NONE),
- PAD_NC(GPP_C20, NONE),
+ PAD_CFG_GPO(GPP_C20, 1, PLTRST), /* BMC alert CPU_THROTTLED# */
PAD_NC(GPP_C21, NONE),
PAD_CFG_GPI_SMI_LOW(GPP_C22, UP_20K, DEEP, EDGE_SINGLE), /* BMC SMI# */
- PAD_NC(GPP_C23, NONE),
+ PAD_CFG_GPI(GPP_C23, NONE, PLTRST), /* CPU CATERR# */
/* GPIO Group GPP_D */
PAD_NC(GPP_D0, NONE),
- PAD_CFG_GPO_GPIO_DRIVER(GPP_D1, 1, DEEP, NONE),
+ PAD_CFG_GPO_GPIO_DRIVER(GPP_D1, 1, DEEP, NONE), /* Power LEDs onboard + JF1 */
PAD_CFG_GPI_NMI(GPP_D2, UP_20K, DEEP, EDGE_SINGLE, INVERT), /* BMC NMI# */
PAD_NC(GPP_D3, NONE),
PAD_CFG_GPO_GPIO_DRIVER(GPP_D4, 0, PLTRST, NONE),
@@ -102,11 +102,11 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_D15, NONE),
PAD_NC(GPP_D16, NONE),
PAD_NC(GPP_D17, NONE),
- PAD_CFG_GPO_GPIO_DRIVER(GPP_D18, 1, PLTRST, NONE),
- PAD_CFG_GPO_GPIO_DRIVER(GPP_D19, 1, PLTRST, NONE),
+ PAD_CFG_GPO_GPIO_DRIVER(GPP_D18, 1, PLTRST, NONE), /* PERST# CPU PCIe Slots */
+ PAD_CFG_GPO_GPIO_DRIVER(GPP_D19, 1, PLTRST, NONE), /* PERST# PCH PCIe Slots */
PAD_NC(GPP_D20, NONE),
PAD_CFG_GPO_GPIO_DRIVER(GPP_D21, 0, DEEP, NONE),
- PAD_CFG_GPI_INT(GPP_D22, NONE, RSMRST, OFF),
+ PAD_CFG_GPI(GPP_D22, NONE, RSMRST), /* BMC enable/disable jumper JPB1 */
PAD_NC(GPP_D23, NONE),
/* GPIO Group GPP_E */
@@ -151,10 +151,10 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_GPO_GPIO_DRIVER(GPP_F23, 0, RSMRST, NONE),
/* GPIO Group GPP_G */
- PAD_CFG_GPI_INT(GPP_G0, NONE, DEEP, OFF),
- PAD_CFG_GPI_INT(GPP_G1, NONE, DEEP, OFF),
- PAD_CFG_GPI_INT(GPP_G2, NONE, DEEP, OFF),
- PAD_CFG_GPI_INT(GPP_G3, NONE, DEEP, OFF),
+ PAD_NC(GPP_G0, NONE), /* JPCIE6-A19 (DGPU_PWR_EN#) */
+ PAD_NC(GPP_G1, NONE), /* JPCIE6-B32 (DGPU_PWR_OK) */
+ PAD_NC(GPP_G2, NONE), /* JPCIE6-B30 (DGPU_SEL#) */
+ PAD_NC(GPP_G3, NONE), /* JPCIE6-B82 (DGPU_PRSNT#) */
PAD_NC(GPP_G4, NONE),
PAD_NC(GPP_G5, NONE),
PAD_NC(GPP_G6, NONE),
@@ -163,15 +163,15 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_G9, NONE),
PAD_NC(GPP_G10, NONE),
PAD_NC(GPP_G11, NONE),
- PAD_CFG_GPI_INT(GPP_G12, NONE, PLTRST, OFF),
- PAD_CFG_GPI_INT(GPP_G13, NONE, PLTRST, OFF),
- PAD_CFG_GPI_INT(GPP_G14, NONE, PLTRST, OFF),
- PAD_CFG_GPI_INT(GPP_G15, NONE, PLTRST, OFF),
- PAD_CFG_GPI_INT(GPP_G16, NONE, PLTRST, OFF),
+ PAD_CFG_GPI(GPP_G12, NONE, PLTRST), /* SKU_ID[0] */
+ PAD_CFG_GPI(GPP_G13, NONE, PLTRST), /* SKU_ID[1] */
+ PAD_CFG_GPI(GPP_G14, NONE, PLTRST), /* SKU_ID[2] */
+ PAD_CFG_GPI(GPP_G15, NONE, PLTRST), /* SKU_ID[3] */
+ PAD_CFG_GPI(GPP_G16, NONE, PLTRST), /* SKU_ID[4] */
PAD_NC(GPP_G17, NONE),
PAD_CFG_NF(GPP_G18, NONE, DEEP, NF1), /* BMC NMI# */
PAD_CFG_NF(GPP_G19, NONE, DEEP, NF1), /* BMC SMI# */
- PAD_NC(GPP_G20, NONE),
+ PAD_CFG_GPI(GPP_G20, NONE, PLTRST), /* JPI2C1 PWRFAIL# */
PAD_NC(GPP_G21, NONE),
PAD_NC(GPP_G22, NONE),
PAD_NC(GPP_G23, NONE),