diff options
| -rw-r--r-- | src/arch/x86/car.ld | 7 | ||||
| -rw-r--r-- | src/soc/intel/xeon_sp/cpx/Kconfig | 15 |
2 files changed, 19 insertions, 3 deletions
diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld index 63145f153e..68144c9d43 100644 --- a/src/arch/x86/car.ld +++ b/src/arch/x86/car.ld @@ -7,6 +7,7 @@ . = CONFIG_DCACHE_RAM_BASE; .car.data . (NOLOAD) : { _car_region_start = . ; + . += CONFIG_FSP_M_RC_HEAP_SIZE; #if CONFIG(PAGING_IN_CACHE_AS_RAM) /* Page table pre-allocation. CONFIG_DCACHE_RAM_BASE should be 4KiB * aligned when using this option. */ @@ -83,6 +84,12 @@ _car_region_end = . + CONFIG_DCACHE_RAM_SIZE - (. - _car_region_start) - CONFIG_FSP_T_RESERVED_SIZE; } + +. = _car_region_start; +.car.fspm_rc_heap . (NOLOAD) : { +. += CONFIG_FSP_M_RC_HEAP_SIZE; +} + . = _car_region_end; .car.mrc_var . (NOLOAD) : { . += CONFIG_DCACHE_RAM_MRC_VAR_SIZE; diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig index 7b583cd14a..ded69987ea 100644 --- a/src/soc/intel/xeon_sp/cpx/Kconfig +++ b/src/soc/intel/xeon_sp/cpx/Kconfig @@ -43,13 +43,22 @@ config DCACHE_RAM_SIZE config DCACHE_BSP_STACK_SIZE hex - default 0x140000 + default 0x40000 help The amount of anticipated stack usage in CAR by bootblock and other stages. It needs to include FSP-M stack requirement and CB romstage stack requirement. The integration documentation - says this needs to be 256KiB, but practice show this needs to - be a lot more. + says this needs to be 256KiB. + +config FSP_M_RC_HEAP_SIZE + hex + default 0x130000 + help + On xeon_sp/cpx FSP-M has two separate heap managers, one regular + whose size and base are controllable via the StackBase and + StackSize UPDs and a 'rc' heap manager that is statically + allocated at 0xfe800000 (the CAR base) and consumes about 0x130000 + bytes of memory. config CPU_MICROCODE_CBFS_LOC hex |