diff options
-rw-r--r-- | src/mainboard/amd/rumba/auto.c | 11 | ||||
-rw-r--r-- | src/mainboard/dell/s1850/Config.lb | 2 | ||||
-rw-r--r-- | targets/dell/s1850/Config.lb | 9 | ||||
-rw-r--r-- | util/flashrom/flashchips.c | 2 | ||||
-rw-r--r-- | util/probe_superio/probe_superio.c | 8 |
5 files changed, 25 insertions, 7 deletions
diff --git a/src/mainboard/amd/rumba/auto.c b/src/mainboard/amd/rumba/auto.c index 82776281e5..160fddc72f 100644 --- a/src/mainboard/amd/rumba/auto.c +++ b/src/mainboard/amd/rumba/auto.c @@ -25,7 +25,16 @@ static void msr_init(void) { __builtin_wrmsr(0x1808, 0x10f3bf00, 0x22fffc02); - +/* Ollie: here are some registers I think you should also set. */ +#if 0 + /* FIX THIS FOR RUMBA -- this is LIPPERT SETTING */ + __builtin_wrmsr(0x10000018, 0, 0x10076013); + __builtin_wrmsr(0x10000019, 0x696332a3, 0x18000008); + __builtin_wrmsr(0x1000001a, 0x101, 0); + __builtin_wrmsr(0x1000001c, 0xff00ff, 0); + __builtin_wrmsr(0x1000001d, 0x300, 0); + __builtin_wrmsr(0x1000001f, 0, 0); +#endif __builtin_wrmsr(0x10000020, 0xfff80, 0x20000000); __builtin_wrmsr(0x10000021, 0x80fffe0, 0x20000000); __builtin_wrmsr(0x10000026, 0x400fffc0, 0x2cfbc040); diff --git a/src/mainboard/dell/s1850/Config.lb b/src/mainboard/dell/s1850/Config.lb index 57e6b0a1f7..407dedd9dc 100644 --- a/src/mainboard/dell/s1850/Config.lb +++ b/src/mainboard/dell/s1850/Config.lb @@ -147,7 +147,7 @@ chip northbridge/intel/E7520 # mch # -> ISA device pci 1f.0 on - chip superio/NSC/pc8734 + chip superio/NSC/pc8374 device pnp 2e.0 off end device pnp 2e.1 off end device pnp 2e.2 off end diff --git a/targets/dell/s1850/Config.lb b/targets/dell/s1850/Config.lb index b19054eeaa..0330eef6e2 100644 --- a/targets/dell/s1850/Config.lb +++ b/targets/dell/s1850/Config.lb @@ -1,15 +1,16 @@ target s1850 mainboard dell/s1850 -option ROM_SIZE=487424 +option ROM_SIZE=0x100000 +option MAXIMUM_CONSOLE_LOGLEVEL=10 +option DEFAULT_CONSOLE_LOGLEVEL=10 -# Arima hdama romimage "normal" option USE_FALLBACK_IMAGE=0 option ROM_IMAGE_SIZE=0x16000 option LINUXBIOS_EXTRA_VERSION=".0Normal" # payload ../../../payloads/filo.elf - payload /etc/hosts + payload /tmp/filo.elf end romimage "fallback" @@ -17,7 +18,7 @@ romimage "fallback" option ROM_IMAGE_SIZE=0x16000 option LINUXBIOS_EXTRA_VERSION=".0Fallback" # payload ../../../payloads/filo.elf - payload /etc/hosts + payload /tmp/filo.elf end buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback" diff --git a/util/flashrom/flashchips.c b/util/flashrom/flashchips.c index f718e7b140..08eb00cdd1 100644 --- a/util/flashrom/flashchips.c +++ b/util/flashrom/flashchips.c @@ -89,7 +89,7 @@ struct flashchip flashchips[] = { probe_md2802, erase_md2802, write_md2802, read_md2802}, #endif {"LHF00L04", SHARP_ID, SHARP_LHF00L04, NULL, 1024, 64 * 1024, - probe_lhf00l04, erase_lhf00l04, write_lhf00l04, NULL}, + probe_82802ab, erase_82802ab, write_82802ab, NULL}, {NULL,} }; diff --git a/util/probe_superio/probe_superio.c b/util/probe_superio/probe_superio.c index 6bb1347e15..47c28d1ab2 100644 --- a/util/probe_superio/probe_superio.c +++ b/util/probe_superio/probe_superio.c @@ -20,6 +20,7 @@ dump_ns8374(unsigned short port) { printf("Enables: 21=%02x, 22=%02x, 23=%02x, 24=%02x, 26=%02x\n", regval(port,0x21), regval(port,0x22), regval(port,0x23), regval(port,0x24), regval(port,0x26)); + printf("SMBUS at %02x\n", regval(port, 0x2a)); /* check COM1. This is all we care about at present. */ printf("COM 1 is Globally %s\n", regval(port,0x26)&8 ? "disabled" : "enabled"); /* select com1 */ @@ -29,6 +30,13 @@ dump_ns8374(unsigned short port) { printf("COM1 60=%02x, 61=%02x, 70=%02x, 71=%02x, 74=%02x, 75=%02x, f0=%02x\n", regval(port, 0x60), regval(port, 0x61), regval(port, 0x70), regval(port, 0x71), regval(port, 0x74), regval(port, 0x75), regval(port, 0xf0)); + /* select gpio */ + outb(0x7, port); + outb(7, port+1); + printf("GPIO is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled"); + printf("GPIO 60=%02x, 61=%02x, 70=%02x, 71=%02x, 74=%02x, 75=%02x, f0=%02x\n", + regval(port, 0x60), regval(port, 0x61), regval(port, 0x70), regval(port, 0x71), + regval(port, 0x74), regval(port, 0x75), regval(port, 0xf0)); } |