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-rw-r--r--src/mainboard/google/zork/variants/baseboard/devicetree.cb78
1 files changed, 78 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/variants/baseboard/devicetree.cb b/src/mainboard/google/zork/variants/baseboard/devicetree.cb
index 159665f8b7..9db0d239d6 100644
--- a/src/mainboard/google/zork/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/zork/variants/baseboard/devicetree.cb
@@ -60,6 +60,84 @@ chip soc/amd/picasso
register "xhci0_force_gen1" = "0"
+ # Controller0 Port0 Default
+ register "usb_2_port_0_tune_params" = "{
+ .com_pds_tune = 0x03,
+ .sq_rx_tune = 0x3,
+ .tx_fsls_tune = 0x3,
+ .tx_pre_emp_amp_tune = 0x03,
+ .tx_pre_emp_pulse_tune = 0x0,
+ .tx_rise_tune = 0x1,
+ .rx_vref_tune = 0x6,
+ .tx_hsxv_tune = 0x3,
+ .tx_res_tune = 0x01,
+ }"
+
+ # Controller0 Port1 Default
+ register "usb_2_port_1_tune_params" = "{
+ .com_pds_tune = 0x03,
+ .sq_rx_tune = 0x3,
+ .tx_fsls_tune = 0x3,
+ .tx_pre_emp_amp_tune = 0x03,
+ .tx_pre_emp_pulse_tune = 0x0,
+ .tx_rise_tune = 0x1,
+ .rx_vref_tune = 0x6,
+ .tx_hsxv_tune = 0x3,
+ .tx_res_tune = 0x01,
+ }"
+
+ # Controller0 Port2 Default
+ register "usb_2_port_2_tune_params" = "{
+ .com_pds_tune = 0x03,
+ .sq_rx_tune = 0x3,
+ .tx_fsls_tune = 0x3,
+ .tx_pre_emp_amp_tune = 0x03,
+ .tx_pre_emp_pulse_tune = 0x0,
+ .tx_rise_tune = 0x1,
+ .rx_vref_tune = 0x6,
+ .tx_hsxv_tune = 0x3,
+ .tx_res_tune = 0x01,
+ }"
+
+ # Controller0 Port3 Default
+ register "usb_2_port_3_tune_params" = "{
+ .com_pds_tune = 0x03,
+ .sq_rx_tune = 0x3,
+ .tx_fsls_tune = 0x3,
+ .tx_pre_emp_amp_tune = 0x03,
+ .tx_pre_emp_pulse_tune = 0x0,
+ .tx_rise_tune = 0x1,
+ .rx_vref_tune = 0x6,
+ .tx_hsxv_tune = 0x3,
+ .tx_res_tune = 0x01,
+ }"
+
+ # Controller1 Port0 Default
+ register "usb_2_port_4_tune_params" = "{
+ .com_pds_tune = 0x03,
+ .sq_rx_tune = 0x3,
+ .tx_fsls_tune = 0x3,
+ .tx_pre_emp_amp_tune = 0x02,
+ .tx_pre_emp_pulse_tune = 0x0,
+ .tx_rise_tune = 0x1,
+ .rx_vref_tune = 0x5,
+ .tx_hsxv_tune = 0x3,
+ .tx_res_tune = 0x01,
+ }"
+
+ # Controller1 Port1 Default
+ register "usb_2_port_5_tune_params" = "{
+ .com_pds_tune = 0x03,
+ .sq_rx_tune = 0x3,
+ .tx_fsls_tune = 0x3,
+ .tx_pre_emp_amp_tune = 0x02,
+ .tx_pre_emp_pulse_tune = 0x0,
+ .tx_rise_tune = 0x1,
+ .rx_vref_tune = 0x5,
+ .tx_hsxv_tune = 0x3,
+ .tx_res_tune = 0x01,
+ }"
+
# SPI Configuration
register "common_config.spi_config" = "{
.normal_speed = SPI_SPEED_66M, /* MHz */