diff options
| -rw-r--r-- | src/arch/riscv/Kconfig | 38 | ||||
| -rw-r--r-- | src/arch/riscv/Makefile.inc | 19 | ||||
| -rw-r--r-- | src/soc/sifive/fu540/Kconfig | 4 | ||||
| -rw-r--r-- | src/soc/ucb/riscv/Kconfig | 4 |
4 files changed, 61 insertions, 4 deletions
diff --git a/src/arch/riscv/Kconfig b/src/arch/riscv/Kconfig index 9fa43bc9f2..5bde804ce2 100644 --- a/src/arch/riscv/Kconfig +++ b/src/arch/riscv/Kconfig @@ -11,6 +11,44 @@ config RISCV_ABI config RISCV_CODEMODEL string +config ARCH_RISCV_M_DISABLED + bool + +config ARCH_RISCV_M + # Whether a SOC implements M mode. + # M mode is the most privileged mode, it is + # the equivalent in some ways of x86 SMM mode + # save that in M mode it is impossible to turn + # on paging. + # While the spec requires it, there is at least + # one implementation that will not have it due + # to security concerns. + bool + default n if ARCH_RISCV_M_DISABLED + default y + +config ARCH_RISCV_S + # S (supervisor) mode is for kernels. It is optional. + bool + default n + +config ARCH_RISCV_U + # U (user) mode is for programs. + bool + default n + +config ARCH_RISCV_RV64 + bool + default n + +config ARCH_RISCV_RV32 + bool + default n + +config ARCH_RISCV_PMP + bool + default n + config ARCH_BOOTBLOCK_RISCV bool default n diff --git a/src/arch/riscv/Makefile.inc b/src/arch/riscv/Makefile.inc index aee4b3b167..e4c8468ef0 100644 --- a/src/arch/riscv/Makefile.inc +++ b/src/arch/riscv/Makefile.inc @@ -26,10 +26,21 @@ check-ramstage-overlap-regions += stack endif riscv_flags = -I$(src)/arch/riscv/ + +ifeq ($(CONFIG_ARCH_RISCV_RV64),y) +_rv_flags += -D__riscv -D__riscv_xlen=64 -D__riscv_flen=64 +else +ifeq ($(CONFIG_ARCH_RISCV_RV32),y) +_rv_flags += -D__riscv -D__riscv_xlen=32 -D__riscv_flen=32 +else +$(error "You need to select ARCH_RISCV_RV64 or ARCH_RISCV_RV32") +endif +endif + ifeq ($(CCC_ANALYZER_OUTPUT_FORMAT),) riscv_flags += -march=$(CONFIG_RISCV_ARCH) -mabi=$(CONFIG_RISCV_ABI) -mcmodel=$(CONFIG_RISCV_CODEMODEL) else -riscv_flags += -D__riscv -D__riscv_xlen=64 -D__riscv_flen=64 +riscv_flags += $(_rv_flags) endif riscv_asm_flags = -march=$(CONFIG_RISCV_ARCH) -mabi=$(CONFIG_RISCV_ABI) @@ -56,7 +67,7 @@ bootblock-y += virtual_memory.c bootblock-y += boot.c bootblock-y += smp.c bootblock-y += misc.c -bootblock-y += pmp.c +bootblock-$(ARCH_RISCV_PMP) += pmp.c bootblock-y += \ $(top)/src/lib/memchr.c \ $(top)/src/lib/memcmp.c \ @@ -85,7 +96,7 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_RISCV),y) romstage-y += boot.c romstage-y += stages.c romstage-y += misc.c -romstage-y += pmp.c +romstage-$(ARCH_RISCV_PMP) += pmp.c romstage-y += smp.c romstage-y += \ $(top)/src/lib/memchr.c \ @@ -127,7 +138,7 @@ ramstage-y += smp.c ramstage-y += boot.c ramstage-y += tables.c ramstage-y += payload.S -ramstage-y += pmp.c +ramstage-$(ARCH_RISCV_PMP) += pmp.c ramstage-y += \ $(top)/src/lib/memchr.c \ $(top)/src/lib/memcmp.c \ diff --git a/src/soc/sifive/fu540/Kconfig b/src/soc/sifive/fu540/Kconfig index 25b4b46a5d..7910b37860 100644 --- a/src/soc/sifive/fu540/Kconfig +++ b/src/soc/sifive/fu540/Kconfig @@ -14,6 +14,10 @@ config SOC_SIFIVE_FU540 bool select ARCH_RISCV + select ARCH_RISCV_RV64 + select ARCH_RISCV_S + select ARCH_RISCV_U + select ARCH_RISCV_PMP select ARCH_BOOTBLOCK_RISCV select ARCH_VERSTAGE_RISCV select ARCH_ROMSTAGE_RISCV diff --git a/src/soc/ucb/riscv/Kconfig b/src/soc/ucb/riscv/Kconfig index 638d7345c2..5a43aa63c6 100644 --- a/src/soc/ucb/riscv/Kconfig +++ b/src/soc/ucb/riscv/Kconfig @@ -1,5 +1,9 @@ config SOC_UCB_RISCV select ARCH_RISCV + select ARCH_RISCV_RV64 + select ARCH_RISCV_S + select ARCH_RISCV_U + select ARCH_RISCV_PMP select ARCH_BOOTBLOCK_RISCV select ARCH_VERSTAGE_RISCV select ARCH_ROMSTAGE_RISCV |