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authorKyösti Mälkki <kyosti.malkki@gmail.com>2012-04-11 12:19:03 +0300
committerPatrick Georgi <patrick@georgi-clan.de>2012-04-12 10:27:34 +0200
commit3aff1a32087137169fb4165eb2dd11655de27f45 (patch)
treef355095bdb44c137fb2de9eece16e8f366ebe9ff /util
parenteb59636cc5875bac98a949f206e5f8c0462be238 (diff)
Convert AOpen DXPL Plus mainboard to CAR
Tested on real hardware, mainboard with dual Xeon P4 HT CPUs requires cache-as-ram init code with AP SIPI protocol. Also enable 2nd CPU and PATA and clean-up Kconfig and ACPI. Change-Id: I415482f3af22df79d82492c49aed83549f29aa56 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/886 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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